Formal Techniques for Analysing Scenarios using Message Sequence Charts

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• 作者：Pur ; ar Bhaduri ; R. Venkatesh ; Girish K. Palshikar
• 刊名：Electronic Notes in Theoretical Computer Science
• 出版年：2002
• 出版时间：May 2002
• 年：2002
• 卷：65
• 期：7
• 页码：1-17
• 全文大小：196 K

文摘

This paper describes light-weight formal techniques based on Message Sequence Charts (MSCs) for capturing and validating early requirements and design. Our focus is on ease of use in specifying, simulating and validating scenarios, and checking their desired properties efficiently. We discuss how the formalism of High Level Message Sequence Charts (HMSCs or MSC'96), can be used to capture scenarios in use cases, thus enabling the use of tools for analysing them. We then present two formal semantics for HMSCs – an intuitive linear time semantics based on runs, and an operational semantics in terms of a labelled transition system. Next we present a way of describing desired properties of use case scenarios using templates, for validating scenarios with respect to informal requirements. The correctness properties of a collection of MSCs can then be established by efficient algorithms for finding paths in a directed graph representing the precedence relation on the events of the MSCs. We have implemented the operational semantics and the verification algorithms in the form of a simulation and verification tool for analysing scenarios.