基于CPLD的微型继电器时间参数测试电路设计
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摘要
为了便于技术人员对继电器进行筛选,本文提出了一种基于单片CPLD的微型电磁继电器时间参数(吸合时间、释放时间、触点回跳时间)的测试方法,充分利用CPLD的资源来实现继电器多个时间参数的测量,给出了测试电路的硬件结构及各个部分的电路原理图,并通过实验进行了验证.确定其量程为0~99.99 ms,最小分辨率为1μs.该电路具有测量速度快、体积小、成本低和操作简单等优点.
In order to help technical personnel select relay,this paper puts forward a method to test the time parameters( including operation time,release time and contact bounce time) of micro electromagnetic relay. This method is based on one CPLD and makes full use of its resource to implement the measurement of multiple time parameters. The hardware structure and circuit principle diagrams of each part are given. Through experiments we determine that the range of time parameter tester designed in this paper is 0- 99. 99 ms and the minimum resolution is 1 μs. In addition,this circuit has other advantages such as fast measuring speed,small volume,low cost and easy operation.
In order to help technical personnel select relay,this paper puts forward a method to test the time parameters( including operation time,release time and contact bounce time) of micro electromagnetic relay. This method is based on one CPLD and makes full use of its resource to implement the measurement of multiple time parameters. The hardware structure and circuit principle diagrams of each part are given. Through experiments we determine that the range of time parameter tester designed in this paper is 0- 99. 99 ms and the minimum resolution is 1 μs. In addition,this circuit has other advantages such as fast measuring speed,small volume,low cost and easy operation.
引文
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[7]刘超,王立欣,赵丹,等.考虑高频寄生参数继电器EFT干扰机理分析[J].电机与控制学报,2012(5):19-25.
[8]张洪润.FPGA/CPLD应用设计200例[M].北京:北京航空航天大学出版社,2009:3-6.
[2]高金龙.基于虚拟仪器的继电器测试技术研究[D].沈阳:沈阳工业大学,2008:1-5.
[3]冯晓.基于ARM的智能继电器测试系统的设计与研究[D].上海:东华大学,2010:1-4.
[4]TADASHI Yamaguchi,YOSHIHIRO Kawase,HIROKAZU Shiomoto,et al.3-D Finite-Element Analysis of Dynamic Characteristics of Twin-Type Electromagnetic Relay[J].IEEE Conference,2007,4(5):2006-2013.
[5]GYORE A,SEMPERGER S,TIHANYI V.Experimental Analysis of Different Type HTS Rings in Fault Current Limiter.Power Systems[J].IEEE Transactions,2007,4(9):62-6.
[6]曹荣.航天继电器时间参数测试分析技术的研究[D].哈尔滨:哈尔滨工业大学,2008:23-25.
[7]刘超,王立欣,赵丹,等.考虑高频寄生参数继电器EFT干扰机理分析[J].电机与控制学报,2012(5):19-25.
[8]张洪润.FPGA/CPLD应用设计200例[M].北京:北京航空航天大学出版社,2009:3-6.