基于SRIO交换芯片的DSP接口设计
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摘要
构建高速可靠的交换网络是现代信号处理系统发展的必然趋势,本文提出了基于SRIO交换芯片的DSP接口设计,实现了多片DSP与FPGA之间的海量数据传输,并且提供了SRIO链路维护方法,极大保障了传输链路的可靠性。
Constructing high speed and reliable switching networks is an inexorable development trend to modern signal processing systems. This paper proposes a design of a DSP interface based on SRIO switch chips, with which mass data transmission between multiple DSP chips and FPGA chips is realized. This paper also proposes a method for SRIO link maintenance which can greatly guarantee the reliability of SRIO transmission links.
Constructing high speed and reliable switching networks is an inexorable development trend to modern signal processing systems. This paper proposes a design of a DSP interface based on SRIO switch chips, with which mass data transmission between multiple DSP chips and FPGA chips is realized. This paper also proposes a method for SRIO link maintenance which can greatly guarantee the reliability of SRIO transmission links.
引文
[1] ZHANG Y,WANG Y,ZHANG P.Research on Physical Layer Traffic Management Schemes in Serial RapidIO Interconnect[J].The Journal of China Universities of Posts and Telecommunications,2011,18(1):64-69.
[2] Integrated Device Technology,Inc.CPS-1848 Datasheet[EB/OL].[2012-06-08].
[3] Integrated Device Technology,Inc.CPS-1848 User Manual[EB/OL].[2012-05-07].
[4] Texas Instruments.TMS 320C6678 Multicore Fixed and Floating Point Digital Signal Processor Data Manual[EB/OL].[2012-02].
[5] KeyStone Architecture Serial Rapid IO User Guide,November,2012.
[2] Integrated Device Technology,Inc.CPS-1848 Datasheet[EB/OL].[2012-06-08].
[3] Integrated Device Technology,Inc.CPS-1848 User Manual[EB/OL].[2012-05-07].
[4] Texas Instruments.TMS 320C6678 Multicore Fixed and Floating Point Digital Signal Processor Data Manual[EB/OL].[2012-02].
[5] KeyStone Architecture Serial Rapid IO User Guide,November,2012.