一种基于FPGA的卷积神经网络模型设计
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摘要
武器装备的智能化已经成为一种发展趋势,卷积神经网络(CNN)在图像识别、目标检测和跟踪任务中展现出优异的性能,因此,将卷积神经网络算法应用于相关武器有助于提升其在复杂战场环境下的精确目标识别和抗干扰能力。本文提出了一种基于FPGA的卷积神经网络模型设计方法,并且在Xilinx Virtex-7系列FPGA验证了其功能的正确性。该模型具有可配置、可重构的高灵活性,移植能力强,适用范围广。
Recently, intellectualization of weapon equipment has become a development trend. Convolutional neural network(CNN) has demonstrated extraordinary performance in image classification, target detection and tracking tasks. Therefore, applying CNN algorithm to weapon equipment can improve the ability of object identification and anti-interference in complex environment. In this paper, a design method of FPGA-based convolutional neural network model is presented, and the function is verified on the Xilinx Virtex-7 series FPGA. The model is reconfigurable and flexible, which has strong transplant ability and wide application range.
Recently, intellectualization of weapon equipment has become a development trend. Convolutional neural network(CNN) has demonstrated extraordinary performance in image classification, target detection and tracking tasks. Therefore, applying CNN algorithm to weapon equipment can improve the ability of object identification and anti-interference in complex environment. In this paper, a design method of FPGA-based convolutional neural network model is presented, and the function is verified on the Xilinx Virtex-7 series FPGA. The model is reconfigurable and flexible, which has strong transplant ability and wide application range.
引文
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[2] Krizhevsky A,Sutskever I,Hinton G E.ImageNet Classification with Deep Convolutional Neural Networks[C]// Proceedings of the 25th International Conference on Neural Information Processing Systems,2012:1097-1105.
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[5] Lécun Y,Bottou L,Bengio Y,et al.Gradient-Based Learning Applied to Document Recognition[J].Proceedings of the IEEE,1998,86(11):2278-2324.
[6] Chen Y H,Emer J,Sze V.Eyeriss:A Spatial Architecture for Energy-Efficient Dataflow for Convolutional Neural Networks[C]// 43rd ACM/IEEE International Symposium on Computer Architecture,Seoul,2016:367-379.
[7] 丁晓彤.基于FPGA的可配置神经网络全连接层设计及参数压缩[D].西安:西安交通大学,2017:23-31.Ding Xiaotong.Full Connection Layer Design and Parameters Compression for FPGA-Based Reconfigurable Convolutional Neural Network [D].Xi’an:Xi’an Jiaotong University,2017:23-31.(in Chinese)
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[9] Cong J,Xiao B J.Minimizing Computation in Convolutional Neural Networks[C]// 24th International Conference on Artificial Neural Networks,Hamburg,2014:281-290.
[10] Chen Tianshi,Du Zidong,Sun Ninghui,et al.DianNao:A Small-Footprint High-Throughput Accelerator for Ubiquitous Machine-Learning[J].ACM SIGPLAN Notices,2014,49(4):269-284.
[11] Lin D D,Talathi S S,Annapureddy V S.Fixed Point Quantization of Deep Convolutional Networks[C]//Proceedings of the 33rd International Conference on Machine Learning,2016,48:2849-2858.