基于MicroBlaze软核的等精度频率计设计
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摘要
本文在VIVADO软件开发平台下,首先基于Micro Blaze软核,利用Verilog HDL设计等精度频率计内部各功能模块,通过嵌入到FPGA芯片上构成SOPC系统,而后再基于SDK软件,利用C语言进行程序设计,通过FPGA高速的数据处理能力,实现对被测信号频率、周期的测量与显示。
This paper is designed by the software development platform of VIVADO. Based on the soft core of Micro Blaze, the internal functional modules of equal-precision frequency counter are designed by Verilog HDL, which is embed into the chip of FPGA to construct the system of SOPC? On the basis of SDK software, the program design is utilized by the C programming language? By means of the high-speed data processing capability of FPGA, which can implement the measurement and display of measured signal with frequency, period, pulse width and duty ratio?
This paper is designed by the software development platform of VIVADO. Based on the soft core of Micro Blaze, the internal functional modules of equal-precision frequency counter are designed by Verilog HDL, which is embed into the chip of FPGA to construct the system of SOPC? On the basis of SDK software, the program design is utilized by the C programming language? By means of the high-speed data processing capability of FPGA, which can implement the measurement and display of measured signal with frequency, period, pulse width and duty ratio?
引文
[1]林建英,高苗苗,杨素英.基于SOPC的等精度数字频率计设计[J].国外电子测量技术,2012,29(12):55-13.
[2]莫琳.基于FPGA的等精度频率计的设计与实现[J].现代电子技术,2004,177(10):081-084.
[3]刘永健.软核嵌入处理器Micro Blaze[J].计算机与网络,2012,15:64-36.
[2]莫琳.基于FPGA的等精度频率计的设计与实现[J].现代电子技术,2004,177(10):081-084.
[3]刘永健.软核嵌入处理器Micro Blaze[J].计算机与网络,2012,15:64-36.