摘要
在宽带信号采样的情况下,基带部分需要进行高速数据处理,此时单通道数据处理很难满足时序要求。而并行数据处理会占用大量的FPGA资源,这就需要对并行算法进行优化。在不同的场景下输出数据速率要求不同,这就要求进行数据速率变换。本文讨论了如何对并行FIR滤波器进行优化设计,同时也论述了如何利用多相分解技术进行数据速率变换,结果说明优化后的算法能大幅减少FPGA资源的消耗,并能适应多速率数据变换的应用场景。
In the case of wideband signal sampling, the baseband requires high-speed data processing, however, the parallel design will occupy a large amount of FPGA resources, which requires optimization of parallel algorithms. in different application scenarios, the output data rate requirements are different. This requires data rate conversion while parallel processing. This paper discusses how to optimize the parallel FIR filter, and also discusses how to use the polyphase decomposition technique for data rate conversion. The result shows that the optimized algorithm can greatly reduce the consumption of FPGA resources and can adapt to the multi-rate application.
引文
[1]杜勇.数字滤波器的MATLAB与FPGA实现[M].北京:电子工业出版社,2017-09-01.
[2]John G.Proakis,Dimitris G.Manolakis.Digital Signal Processing,Fourth Edition.[M]北京:电子工业出版社2014-08-01.
[3]陶然,张慧云,王越.多抽样率数字信号处理理论及应用[M]北京:清华大学出版社.