智能视频监控算法及硬件实现研究
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摘要
随着经济技术的发展和人们安全意识的提高,作为在安全方面应用最早且最广泛使用的视频监控显得愈发重要。它利用摄像机使相关人员能够远程实时监控一些重要的区域。目前视频监控正向智能视频监控方向发展。智能视频监控具有人所没有的优点,逐渐将人从视频监控中解放出来。它主要基于对视频内容的分析,检测出目标,对目标跟踪和识别,并分析其行为特征。智能视频监控离不开准确而可靠的视频分析算法,这些算法往往需要处理大量数据,消耗相当多的计算资源,给监控的实时性带来很大的挑战。目前出现了很多基于FPGA或芯片的硬件模块或平台作为视频分析引擎用于智能视频监控,加快了视频处理速度使监控更加流畅。本文从智能视频监控算法和视频分析引擎中硬件实现这两部分开展研究,主要完成以下几个方面的工作。
     (1)研究了运动检测中的背景建模方法,提出一种基于拉普拉斯分解和混合高斯模型的背景建模算法。利用金字塔变换把图像分解为图像的高频和低频部分,只对低频部分信息中像素的静态特征和动态特征用混合高斯模型建模,最后用高频信息还原得到原始尺度下的运动物体。该方法降低了易受扰动的高频部分对模型的干扰,也减少了存储低频信息所需的存储空间,在测试时取得良好的效果。同时还提出了改进的相邻帧差法并用硬件实现了该算法功能,极大的提高了检测速度和效率。
     (2)分析Adaboost算法特点及其改进形式,研究了其在人脸检测和目标跟踪中的应用,并通过实验比较分析了几种基于boosting的目标跟踪算法。
     (3)人脸实时检测需要庞大的计算量和软硬件的支持,研究了基于Adaboost算法的人脸检测硬件实现架构,提出一种并行计算Haar矩形特征实现人脸检测的架构。通过将分类器特征分组并定义相应的处理单元,引入多组架构进一步提升并行计算能力,为了减少因流水线深度增加带来的负面影响,在分类器中不同阶段采用不同的预测方式。同时还提出了基于ASIC的人脸检测硬件架构。
     (4)在视频监控所用的芯片中,集成视频分析引擎的芯片往往规模很大,会生成大量的测试向量。研究了测试向量压缩技术,提出了两种测试向量压缩算法,都是根据测试向量间存在的大量相容关系,将相容关系最大的合并为一组,一种是用FDR-BC对合并后的向量编码,另一种是用CBCT方法对合并后的向量三种游程进行编码。将这两种方法分别与典型的压缩算法作比较,压缩效果显著。同时对这两种压缩方法分别设计了相应的解码器。
Video surveillance is becoming more important as the first and most widely used method along with the development of economy and safety consciousness. It enables people to monitor some important areas remotely in real time. The method currently is on the trend of intelligent video surveillance, which has some advantages that humans have not and gradually released people from video surveillance. The intelligent video surveillance is based on video content analysis, which includes detecting objects, tracking and identifying them, and analyzing their behaviors. Accurate and reliable video content analysis algorithms are indispensable for the surveillance system. However these algorithms generally have to process huge data and consume more computing resources, which bring great challenge to real-time monitoring. Recently there appear some hardware modules or platforms based on FPGA or chip as the video analysis engine for intelligent video surveillance. The video analysis engine improves processing speed and makes the surveillance fluent. We pay more attention to both the algorithm of intelligent video surveillance and the hardware implementation of video analysis engine in the thesis. The main research work consists of four parts as follows.
     (1) We have studied the background model in motion detection, and proposed a background model algorithm using mixture of Gaussians and Laplacian pyramid decomposition. The Laplacian pyramid is employed to decompose the image into low-frequency and high-frequency parts. We only make use of the static and dynamic features of pixels in low-frequency parts to model the background using mixture of Gaussians. After the motion objects in low-frequency parts have been extracted, we begin to use high-frequency parts to restore the objects in original size. The method not only reduces the disturbance of high-frequency parts to the model, but also decreases the demand for the memory space. The method achieve good results based on the experiments we have done using test videos. We have also presented the method of improved temporal differencing and its hardware implementation, which significantly increase the detection speed and efficiency.
     (2) The features and improved forms of Adaboost algorithm have been analyzed in the thesis. We also made some research on its application in face detection and object tracking, and compared some tracking algorithms based on boosting.
     (3) Face detection cost huge computing resources and need the support of software and hardware. We have studied some hardware architectures of face detection based on Adaboost, and proposed a novel architecture parallelly computing Haar features. By dividing feature set into groups and defining corresponding processing element, we introduce a multi-group architecture to further improve its parallelly computing power. We adopt different prediction mechanisms for different stages in the classifiers in order to reduce the side effect of the increased pipeline depth. Hardware architecture for face detection based on ASIC has been presented in the end.
     (4) The chips used in video surveillance which include video content analysis are usually large in scale, which will generate a great number of test vectors. We have proposed two kinds of test vector compression methods, both of which are based on the compatibility among test vectors. Test vectors are grouped based on their compatibility relationship and the test vectors in the group are merged into one vector. One compression technology adopts FDR-BC to encode the merged vectors, and the other employs CBCT to encode three kinds of runs in the merged vectors. Experiments with the test sets show that the method can achieve higher compression ratio compared with some classic compression methods. We also designed two corresponding decoders.
引文
[1]H.M.Chen,S.Lee,R.M.Rao,M.A.Slaman,P.K.Varshney. Imaging for concealed weapon detection. IEEE Signal Processing Magazine,2005,22(2):52-61.
    [2]R.T.Collins,A.J.Lipton,H.Fujiyoshi,T.Kanade. A system for video surveillance and monitoring:VSAM final report. CMU-RI-TR-00-12,Robotic Institute Carnegie Mellon University,2000.
    [3]G.L. Foresti, C.S. Regazzoni, R. Visvanathan. Scanning the issue/technology Special issue on video communications, processing and understanding for third generation surveillance systems. Proceedings of the IEEE,2001,89(10):1355-1367.
    [4]GL.Foresti, C.Micheloni, L.Snidaro, P.Remagnino, T.Ellis. Active Video-Based Surveillance System. IEEE Signal Processing Magazine,2005,22(2):25-37.
    [5]M. W. Green. The Appropriate and Effective Use of Security Technologies in U.S. Schools, A Guide for Schools and Law Enforcement Agencies. Sandia National Laboratories,1999, NCJ 178265.
    [6]A. Hampapur, L.Brown, J.Connell, S.Pankanti.A.Senior,Yngli Tian.Proceedings of the 2003 Joint Conference of the Fourth International Conference on Information. Communications and Signal Processing,2003 and the Fourth Pacific Rim Conference on Multimedia,2003,2:1133-1138.
    [7]Kingston University, Mott MacDonald and Ipsotek Limited:Maximising benefits from CCTV on the railway-existing systems.Technical report, Rail Safety and Standards Board (2003)
    [8]Y.Pritch, A. Rav-Acha,S.Peleg. Nonchronological Video Synopsis and Indexing. IEEE Transactions on Pattern Annalysis and Machine Intellegence. 2008,30(11):1971-1984.
    [9]T.Jan. Neural Network Based Threat Assessment for Automated Visual Surveillance.Proceedings of IEEE International Joint Conference on Neural Networks, 2004,2:1309-1312.
    [10]方帅。计算机智能视频监控系统关键技术研究[博士学位论文]。东北大学,2005:83-99.
    [11]C. Cohen, F. Morelli, K. Scott.A Surveillance System for Recognition of Intent within Individuals and Crowds. IEEE Conference on Technologies for Homeland Security, Waltham, MA,2008:559-565.
    [12]W. Hu, T. Tan. L. Wang,S. Maybank.A Survey on Visual Surveillance of Object Motion and Behaviors. IEEE Transactions on Systems, Man, and Cybernetics, Part C: Application and Review,2004,34(3):334-352.
    [13]D.Marr. Vision.A Computational Investigation into the Human Representation and Processing of Visual Information. New York:W.H. Freeman,1982.
    [14]Eutecus, Inc. Multi-core Video Analytics Engine, http://www.eutecus.com/.
    [15]TI. DMVAI IP网络摄像机SoC.http://www.ti.com.cn/apps/cn/docs/mrktgen page.tsp?contentld=41246&appld=79.
    [16]海思半导体有限公司。HI3532.http://www.hisilicon.com/.
    [17]W.K.Chan,J.YChang,T.W. Chen, Y.H.Tseng,S.Y.Chien. Efficient Content Analysis Engine for VisualSurveillance Network. IEEE Transactions on Circuits and Systems for Video Technology,2009,19(5):693-703.
    [18]Y.A. Johnson,A.F.Bobick.A Multi-view Method for Gait Recognition Using Static Body Parameters. Proceedings of the 3rd International Conference on Audio and Video Based Biometirc Person Authentication, Halmstad, Sweden, June 2001:301-311.
    [19]I.Haritaoglu,D.Harwood,LS.Davis. W4:Real-Time Surveillance of People and Their Activities.IEEE Transactionson Pattern Analysis and Machine Intelligence, 2000.22(8):809-830.
    [20]R. Fisher, J. Crowley,J.S.Victor.Context Aware Vision using Image-based Active Recognition.2005, http://homepages.inf.ed.ac.uk/rbf/CAVIAR/caviar.htm.
    [21]ISCAPS(Integrated Surveillance of Crowded Areas for Public Security).2004, http://iscaps.net.
    [22]VACE(Video Analysis and Content Extraction).2006, www.perceptual-vision. com/vt4ns/vace_brochure.pdf
    [23]K. Appiah, A. Hunter. A Single-Chip FPGA Implementation of Real-time Adaptive Background Model. Proceedings of IEEE International Conference on Field-Programmable Technology.2005,95-102.
    [24]M.M. Abutaleb, A. Hamdy, M.E. Abuelwafa,E.M.Saad. FPGA-Based Object-Extraction based on Multimodal Z-A Background Estimation. Proceedings of 2nd International Conference on Computer, Control and Communication,2009:1-7.
    [25]M.M. Abutaleb, A. Hamdy, E.M. Saad. FPGA-Based Real-Time Video-Object Segmentation with Optimization Schemes. International Journal of Circuits, Systems. and Signal Processing,2008.2(2):78-86.
    [26]Sourceforge. Open Computer Vision Library.2008, http://sourceforge.net/proj-ects/opencvlibrary/.
    [27]R. Mech, M. Wollborn. A noise robust method for segmentation of moving objects in video sequences. Procedings of International Conference on Acoustics,Speech and Signal Processing,1997,4:41-45.
    [28]A,Neri, S.Colonnese, G.Russo and P.Talone. Automatic moving object and background separation. Signal Processing,1998,66:219-232.
    [29]A.J.Lipton, H.Fujiyoshi and R.S.Patil. Moving target classification and tracking from real-time video. Procedings of IEEE workshop on Applications of Computer Vision,1998:8-14.
    [30]P.L.Rosin. Thresholding for change detection. Procedings of IEEE International Conference on Computer Vision,1998:274-279.
    [31]J. Chase, B. Nelson, J. Bodily, Z. Wei, and D.J. Lee, Real-Time Optical Flow Calculations on FPGA and GPU Architectures:A Comparison Study. Proceedings of 16th International Symposium on Field-Programmable Custom Computing Machines,2008:173-182.
    [32]D.q. Sun, S. Roth, J.P. Lewis, and M. J. Black. Learning Optical Flow. Proceedings of 10th European Conference on Computer Vision,2008:83-97.
    [33]T. Low, G. Wyeth. Obstacle Detection using Optical Flow. Proceedings of Australasian Conference on Robotics and Automation,2005:
    [34]C.Ridder, O.Munkelt, and H.Kirchner. Adaptive Background Estimation and Foreground Detection using Kalman-Filtering. Procedings of IEEE International Conference on Recent Advances in Mechatronics(ICRAM'95),1995:193-199.
    [35]W.R.Chrisopher,A.Azarbayejani,T.Darrell.and A.P.Pentland. Pfmder:Real-Time Tracking of the Human Body. IEEE Transactions on Pattern Analysis and Machine Intelligence.1997,19:780-785.
    [36]C.Stauffer and W.E.L Grimson. Learning Patterns of Activity Using Real-Time Tracking. IEEE Transcations on Pattern Recognition and Machine Intelligence, 2000,22:747-757.
    [37]P.KaewTraKulPong and R.Bowden. An improved adaptive background mixture model for real-time tracking with shadow detection. Procedings of IEEE 2nd European Workshop on Advanced Video-Based Surveillance systems,2001:1-5.
    [38]A.Elgammal,D.Harwood and L.Davis. Non-parametric model for background subtraction. Procedings of Europeon Conference on Computer Vision,2000:751-767.
    [39]L.Y.Li, W.M.Huang,Irene Y.H.Gu,and Q.Tian. Foreground object detection from videos containing complex background. Procedings of the eleventh ACM international conference on Multimedia,2003:2-10.
    [40]Y.Kita. Background Modeling by Combining Joint Intensity Histogram with Time-sequential Data. Procedings of 20th International Conference on Pattern Recognition(ICPR),2010:991-994.
    [41]Y.Kita. Change detection using joint intensity histogram. Procedings of 18th International Conference on Pattern Recognition,2006:351-356.
    [42]H.H.Lin,T.L.Liu,J.H.Chuang. Learning a Scene Background Model via Classification. IEEE Transactions on Signal Processing,2009,57(5):1641-1654.
    [43]Y.F.Zha, D.Bi, Y.Yang. Learning complex background by multi-scale discriminative model. Pattern Recognition Letters,2009,30(11):1003-1014.
    [44]Grabner, H. Bischof, H. On-line Boosting and Vision. IEEE Computer Society Conference on Computer Vision and Pattern Recognition,2006:260-267.
    [45]M.Heikkila,M. Pietikainen. A texture-based method for modeling the background and detecting moving objects.IEEE Transactions on Pattern analysis and Machine Intelligence,2006,28(4):657662.
    [46]S.C. Liao, G.y. Zhao, V. Kellokumpu, M. Pietikainen, S. Z. Li. Modeling Pixel Process with Scale Invariant Local Patterns for Background Subtraction in Complex Scenes. Procedings of IEEE Conference on Computer Vision and Pattern Recognition. 2010:1301-1306.
    [47]P.J.Burt, E.H.Adelson. The laplacian pyramid as a compact image code. IEEE Transactions on Communications,1983,31(4):532-540.
    [48]T.Horprasert, D.Harwood, S.L.Davis. A statistical approach for real-time robust background subtraction and shadow detection. Procedings of IEEE Frame-Rate Workshop,1999:567-572.
    [49]A.Prati, I.Mikic,M.M.Trivedi, R.Cucchiara. Detecting moving shadows: algorithm and evaluation. IEEE Transactions on Pattern Analysis and Machine Intelligence,2003,25(7):918-923.
    [50]Y. Freund.R. Schapire. A decision-theoretic generalization of on-line learning and an application to boosting. Journal of Computer and System Sciences,1997, 55(1):119-139.
    [51]L.G.Valiant. A theory of the learnable. Communications of the ACM,1984.27 (11):1134-1142.
    [52]M.J.Kearns,U.V.Vazirani.An Introduction to Computational Learning Theory.MIT Press,1994.
    [53]M. Kearns, L. G. Valiant. Learning Boolean formulae or finite automata is as hard as factoring. Technical Report TR-14-88, Harvard University Aiken Computation Laboratory, August 1988.
    [54]M. Kearns, L. G. Valiant. Cryptographic limitations on learning Boolean formulae and finite automata. Journal of the Association for Computing Machinery, 1994,4 1(1):67-95.
    [55]R.E.Schapire. The strength of weak learnability. Machine Learning,1990,5(2): 197-227.
    [56]A. Blumer, A. Ehrenfeucht, D. Haussler, M. K. Warmuth. Learnability and the Vapnik-Chervonenkis dimension. Journal of the Association for Computing Machinery,1989,36(4):929-965.
    [57]E.B.Baum,D.Haussler. What size net gives valid generalization? Neural Computation,1989,1 (1):151-160.
    [58]H.Drucker, C. Cortes. Boosting decision trees. Advances in Neural Information Processing Systems,1996:479-485.
    [59]J. R. Quinlan. Bagging, boosting, and C4.5. Proceedings of the Thirteenth National Conference on Artificial Intelligence,1996:725-730.
    [60]P. L. Bartlett. The sample complexity of pattern classification with neural networks:thesize of the weights is more important than the size of the network.IEEE Transactions on Information Theory,1998,44(2):525-536.
    [61]R. E. Schapire, Y. Freund, P. Bartlett, W. S. Lee. Boosting the margin:A new explanation for the effectiveness of voting methods.The Annals of Statistics,1998,26 (5):1651-1686.
    [62]R.E.Schapire, Y.Singer. Improved boosting algorithms using confidence-rated predictions. Machine Learning,1998,37:297-336.
    [63]J.Friedman,T.Hastie,R.Tibshirani.Additive Logistic Regressions Statistical View of Boosting.The annals of Statistics,2000,28(2):337-374.
    [64]J.H.Friedman.Greedy Function Approximation:A Gradient Boosting Machine. The Annals of Statistics.2001,29(5):1189-1232.
    [65]P.Viola, M.Jones. Rapid object detection using boosted cascade of simple features. IEEE Conference on Computer Vision and Pattern Recognition, 2001,1:511-518.
    [66]R. Lienhart, J. Maydt. An Extended Set of Haarlike Features for Rapid Object Detection. Proceedings of IEEE International Conference on Image Processing 2002, 1:900-903.
    [67]R.Lienhart,J.Maydt. Empirical analysis of detection cascades of boosted classifiers for rapid object detection.Pattern Recognnition,2003,2781:297-304.
    [68]Y.Ma,X.Q.Ding.Robust real-time face detection based on cost-sensitive adaboost method. Proceedings of IEEE International Conference on Multimedia and Expo,2003,1:465-468.
    [69]P. Viola, M. Jones. Fast and robust classification using asymmetric adaboost and a detector cascade. Advances in Neural Information Processing System,2002.14: 1311-1318.
    [70]J. X. Wu, M. D. Mullin, J. M. Rehg. Linear asymmetric classifier for cascade detectors. Proceedings of the 22nd International Conference on Machine Learning. 2005:988-995.
    [71]J. X. Wu, S. C. Brubaker, M. D. Mullin,Rehg, J.M. Fast asymmetric learning for cascade face detection. IEEE Transaction on Pattern Analysis and Machine Intelligence.2008,30(3):369-382.
    [72]X. W Hou, C. L Liu, T. Tan. Learning boosted asymmetric classifiers for object detection. Proceedings of the IEEE Conference on Computer Vision and Pattern Recognition,2006:330-338.
    [73]Q. J Li, Y. B Mao, Z. Q Wang, W.B.Xiang. Cost-sensitive boosting:fitting an additive asymmetric logistic regression model. Proceedings of the 1st Asian Conference on Machine Learning:Advances in Machine Learning.2009:234-247.
    [74]李三平,魏镇韩,张毓深。一种基于Adaboost的分层特征空间人脸检测的方法。模式识别与人工智能,2007,20(3):435-439.
    [75]张建明,汪大庆。基于Adaboost算法的多姿态人脸实时视频检测。计算机工程与设计,2010,31(18):4065-4067,4096。
    [76]H. Goszczynska.OBJECT TRACKING. Rijeka, Croatia:InTech,2011.
    [77]M.Isard, A.Blake. Condensation Conditional Density Propagation for Visual Tracking. International Journal of Computer Vision,29(1):5-28.
    [78]O.Cappe, J.S.Godsill, E.Moulines. An Overview of Existing Methods and Recent Advances in Sequential Monte Carlo. Proceedings of IEEE,2007,95(5):899-924.
    [79]A.Doucet, A.M.Johansen. A Tutorial on Particle Filtering and Smoothing:Fifteen years later, in Oxford Handbook of Nonlinear Filtering, D. Crisan, B. Rozovsky (Ed.),Oxford University Press, London UK.
    [80]M.D.Breitenstein,F.Reichlin,B.Leibe,E.Koller-Meier,L.V.Gool.Robust tracking-by-detection using a detector confidence particle filter. Proceedings of the 12th IEEE International Conference on Computer Vision, Kyoto,Japan,2009:1515-1522.
    [81]K.Okuma,A.Taleghani,N.D.Freitas,J.Little,D.Lowe.A boosted particle filter: Multitarget detection and tracking. Proceedings of the 8th European Conference on Computer Vision, Prague, Czech,2004:28-39.
    [82]Yuan, Li,Haizhou, Ai.Yamashita, T.,Shihong, Lao,Kawade, M.Tracking in Low Frame Rate Video:A Cascade Particle Filter with Discriminative Observers of Different Lifespans.Proceedings of IEEE Conference on Computer Vision and Pattern Recognition,2007:1-8.
    [83]D.Comaniciu,P.Meer. Mean shift:A robust approach toward feature space analysis. IEEE Transactions on Pattern Analysis and Machine Intelligence 2002,22(5): 603-619.
    [84]S.Baker, I.Matthews. Lucas-Kanade 20 years on:A unifying framework. International Journal of Computer Vision,2004,56(3):221-255.
    [85]Z.Feng, N.Lu, P.Jiang. Posterior probability measure for image matching. PatternRecognition,2008.41(7):2422-2433.
    [86]R.T.Collins, Y. Liu,M.Leordeanu. Online Selection of Discriminative Tracking Features. IEEE Transactions on Pattern Analysis and Machine Intelligence, 2003,27(10):1631-1643.
    [87]B.Lucas, T.Kanade.An iterative image registration technique with an application to stereovision. Proceedings of the 7th international joint conference on Artificial intelligence, Vancouver. British Columbia,1981:674-679.
    [88]D.Comaniciu,V.Ramesh,P. Meer. Kernel-based object tracking. IEEE Transact-ions on Pattern Analysis and Machine Intelligence,25(5):234-240.
    [89]S.Avidan. Support vector tracking. IEEE Transactions on Pattern Analysis and Machine Intelligence,2004,26(8):1064-1072.
    [90]A.Saffari,C.Leistner,J.Santner,M.Godec,H.Bischof.On-line random forests. Proc-eedings of the 12th IEEE International Conference on Computer Vision, Kyoto, Japan, 2009:1-8.
    [91]S.Avidan. Ensemble Tracking. IEEE Transactions on Pattern Analysis and Machine Intelligence,2007,29(2):261-271.
    [92]Grabner, H.Bischof, H.On-line Boosting and Vision.Proceedings of IEEE Computer Society Conference on Computer Vision and Pattern Recognition, 2006:17-22.
    [93]C.Leistner, H.Grabner, H.Bischof. Semi-Supervised Boosting using Visual Sim- ilarity Learning. Proceedings of the 2008 IEEE Conference on Computer Vision and Pattern Recognition, Anchorage, Alaska, USA,2008:1-8.
    [94]S.Stalder, H.Grabner, L.V.Gool.Beyond Semi-Supervised Tracking:Tracking Should Be as Simple as Detection, but not Simpler than Recognition. Proceedings of the 12th IEEE International Conference on Computer Vision, Kyoto, Japan, 2009:1409-1416.
    [95]M.Godec, H.Grabner,C.Leistner, H. Bischof. Speeding up Semi-Supervised Online Boosting for Tracking. Proceedings of the 33rd annual Workshop of the Austrian Association for Pattern Recognition, Stainz, Austria,2009:1-8.
    [96]H.Grabner, C.Leistner,H.Bischof. Semi-supervised On-Line Boosting for Robust Tracking. Proceedings of the 10th European Conference on Computer Vision, Marseille, France,2008:234-247.
    [97]B.Babenko, M-H.Yang,S.Belongie.Visual tracking with online multiple instance learning. Proceedings of the 2009 IEEE Conference on Computer Vision and Pattern Recognition, Miami, FL, USA,2009:1-8.
    [98]B.Zeisl, C.Leistner, A.Saffari, H.Bischof. On-line semi-supervised multiple-instance boosting.2010 IEEE Conference on Computer Vision and Pattern Recognition (CVPR),2010:1879-1879.
    [99]N. Oza. Online Ensemble Learning[PhD thesis].University of California, Berkeley,2001.
    [100]魏武,王健。基于Adaboost和RVM的实时多目标跟踪。计算机工程与设计,2011,32(6):2108-2112.
    [101]王震宇,张可黛,吴毅,卢汉清.基于SVM和Adaboost的红外目标跟踪。中国图象图形学报,2007,12(11):2052-2057.
    [102]PETS:Performance Evaluation of Tracking and Surveillance. http://www.cvg.rdg. ac.uk/slides/pets.html,2006.
    [103]A. Adam, E. Rivlin, I. Shimshoni. Robust fragmentsbased tracking using the integral histogram. Proceedings of IEEE Conference on Computer Vision and Pattern Recognition (CVPR),2006,l:798-805.
    [104]M.H.Yang,J.K.David, A.Narendra. Detecting Faces in Images:A Survey. IEEE Transactions on Pattern Analysis and Machine Intelligence,2002,24(1):34-58.
    [105]C. Garcia and M. Delakis. Convolutional face finder:A neural architecture for fast and robust face detection. IEEE Transactions on Pattern Analysis and Machine Intelligence,2004,26(11):1408-1423.
    [106]E. Osuna, R. Freund,F. Girosi.Training Support Vector Machines:An Application to Face Detection. Proceedings of IEEE Conference on Computer Vision and Pattern Recognition,1997:130-136.
    [107]N.Farrugia, F.Mamalet, S.Roux, F.Yang, M.Paindavoine. Fast and Robust Face Detection on a Parallel Optimized Architecture Implemented on FPGA. IEEE Transactions on Circuits and Systems for Video Technology,2009,19:597-602.
    [108]R.McCready. Real-time face detection on a configurable hardware system. Proceedings of the Roadmap to Reconfigurable Computing, International Workshop on Field-Programmable Logic and Applications, Villach, Austria,2000:157-162.
    [109]T.Theocharides, G.Link,N.Vijaykrishnan,M.J.Irwin,W.Wolf. Embedded hardware face detection. Proceedings of 17th International Conference on VLSI Design, Mumbai, India,2004:133-138.
    [110]H.C.Lai, M.Savvides,T.Chen. Proposed FPGA hardware architecture for high frame rate (>100 fps) face detection using feature cascade classifiers. Biometrics: Theory, Applications, and Systems,2007:1-6.
    [111]C.J.Gao, S.L.Lu. Novel FPGA based Haar classifier face detection algorithm acceleration. Proceedings of International Conference on Field Programmable Logic and Applications, Heidelb- erg, Germany,2008:373-378.
    [112]J.Cho, S.Mirzaei,J.Oberg,R.Kastner. Fpga-based face detection system using haar classifiers. Proceedings of the ACM/SIGDA international symposium on Field programmable gate arrays. Monterey, CA, USA,2009:103-112.
    [113]J.Cho, B. Benson,S.Mirzaei, R.Kastner. Parallelized Architecture of Multiple Classifiers for Face Detection.Proceedings of 20th IEEE Intenational Conference on Application Specific Systems, Architectures and Processors, Boston, Massachusetts, USA,2009:75-82.
    [114]M.Hiromoto, K.Nakahara,H.A.Sugano.Specialized processor suitable for Ada- Boost-based detection with Haar-like features. Proceedings of IEEE Conference on Computer Vision and Pattern Recognition CVPR'07, Minneapolis, Minnesota. USA, 2007:1-8.
    [115]M.Hiromoto, H.Sugano, R.Miyamoto. Partially Parallel Architecture for AdaBo-ost-Based Detection With Haar-Like Features. IEEE Transactions on Circuits and Systems for Video Tech.,2009,19:41-52
    [116]T.Theocharides, N.Vijaykrishnam, M.J.Irwin. A parallel architecture for hardware face detection.Proceedings of IEEE Computer Society Annual Symposium Emerging VLSI Technologi es and Architectures, Karlsruhe, Germany,2006:452-453
    [117]C.Kyrkou, T.Theocharides. A Flexible Parallel Hardware Architecture for AdaBoost-Based Real-Time Object Detection.IEEE Transactions on Very Large Scale Integration (VLSI) Systems,2011,19(6):1034-1047.
    [118]C.R.Chen, W.S.Wong, C.T.Chiu. A 0.64 mm2 Real-Time Cascade Face Detection Design Based on Reduced Two-Field Extraction. IEEE Transactions on Very Large Scale Integration (VLSI) Systems,2010,19:1-12
    [119]S.H.Jin, D.K. Kim, T.T. Nguyen, D.Kim, J.W.Jeon. An FPGA-based parrallel hardware architecture for real-time face detection using a face certainty map.Proceedings of IEEE International conference on application-specific systems-architectures and processors, Boston, Massachusetts, USA,2009:61-66
    [120]R.C.Luo, H.H.Liu. Design and implementation of efficient hardware solution based sub-window architecture of Haar classifiers for real-time detection of face biometrics. Proceedings of 2010 International Conference on Mechatronics and Automation (ICMA), Xi'an, China,2010:1563-1568
    [121]D.Han, J.Choi, J.Cho, D.Kwak. Design and VLSI implementation of high-performance face-detection engine for mobile applications.Proceedings of 2011 IEEE International Conference on Consumer Electronics (ICCE), Berlin, Germany, 2011:705-706
    [122]W.Yu, B. Xiong,C.Chareonsak. Fpga implementation of adaboost algorithm for detection of face biometrics. IEEE International Workshop on Biomedical Circuits and Systems, Marina Mandarin, Singapore,2004. S1/6-17-20.
    [123]C.He. A.Papakonstantinou.D.M.Chen. A novel SoC architecture on FPGA for ultra fast face detection. Proceedings of IEEE International Conference on Computer Design(ICCD), Lake Tahoe, CA, USA,2009:412-418
    [124]Y.H.Shi, F.Zhao, Z.Zhang. Hardware implementation of adaboost algorithm and verification. Proceedings of 22nd International Conference on Advanced Information Networking and Applications-Workshops, GinoWan, Okinawa, Japan,2008:343-346
    [125]唐齐,苏光大。基于Adaboost算法的硬件实时人脸检测。计算机工程,2008,34(7):248-250
    [126]魏良,苏光大,邓亚峰。基于FPGA的快速人脸检测。电子技术应用,2006.11:33-35.
    [127]居然,赵峰。Adaboost算法并行硬件架构研究与FPGA验证。电子测量技术,2009,1:59-62
    [128]张忠,赵峰,孙炜。基于Adaboost算法的人脸检测系统实现。信息技术,2008,32(7):167-170.
    [129]孙莹涛,李玉山。人脸检测系统的SoPC设计。电子设计应用,2006,11:95-96.
    [130]王佶梁。Adaboost算法的VLSI设计研究和FPGA实现[硕士学位论文]。上海交通大学,2008。
    [131]B.KOENEMANN.LFSR-coded test patterns for scan designs. Proceedings of European Test Conference,Munich:VDE-Verlag,1991:237-242.
    [132]S.Hellebrand, S.Tarnick, J.Rajski,B.Courtois. Generation of vector patterns through reseeding of multiple-polynomial linear feedback shift register. Proceedings of International Test Conference, Baltimore,1992:120-129.
    [133]C.V.KRISHNA, A.JAS, N.A.TOUBA.Test vector encoding using partial LFSR reseeding. Proceedings of International Test Conference, Baltimore,2001:885-893.
    [134]S.Hellebrand, J.Rajski, S.Tarnick, S.Venkataraman, B.Courtois. Built-in test for circuits with scan based on reseeding of multiple-polynomial linear feedback shift registers. IEEE Transactions on Computers,1995,44(2):223-233.
    [135]C.V.Krishna, N.A.Touba. Reducing test data volume using LFSR reseeding with seed compression. Proceedings of ITC,2002:321-330.
    [136]E.Volkerink, S.Mitra. Efficient seed utilization for reseeding based compression. Proceedings of the 21st VLSI Test Symposium,2003:232-237.
    [137]J.Rajski, J.Tyszer, N.Zacharia. Test data decompression for multiple scan designs with boundary scan. IEEE Transactions on Computers.1998. 47(11):1188-1200.
    [138]N.Zacharia, J.Rajski, J.Tyszer. Decompression of test data using variable-length seed LFSRs. Proceedings of the 13th VLSI Test Symposium,1995:426-433.
    [139]J.Rajski, J.Tyszer, M.Kassab, N.Mukherjee. Embedded deterministic test. IEEE Transactions on Computer-Aided Design Integrated Circuits Systems,2004,23(5): 776-792.
    [140]B.Koenemann, C.Banhart, B.Keller, T.Snethen, O.Farnsworth, D.Wheater.A smart BIST variant with guaranteed encoding. Proceedings of the 10th Asia Test Symposium,2001:325-330.
    [141]A.Jas, N.A.Touba.Test vector decompression via cyclical scan chains and its application to testing core-based design. Proceedings ITC,1998:458-464.
    [142]A.El-maleh, R.Al-Abaji.Extended frequency directed run length codes with improved application to system-on-a-chip test data compression. Proceedings 9th International Conference Electron Circuits Systems,2002:449-452.
    [143]A.Chandra, K.Chakrabarty.System-on-a-chip test data compression and deco-mpres sion architectures based on Golomb codes. IEEE Transactions on Computer-Aided Design Integrated Circuits Systems,2001,20(3):355-368.
    [144]A.Chandra, K.Chakrabarty. Frequency-directed run-length (FDR) codes with application to system-on-a-chip test data compression. Proceedings 19th IEEE VLSI Test Symposium,2001:42-47.
    [145]A.Chandra, K.Chakrabarty.A unified approach to reduce SOC test data volume. scan power and testing time. IEEE Transactions on Computer-Aided Design Integrated Circuits Systems,2003,22(3):352-363.
    [146]A.Jas, J.Ghosh-Dastidar,N.A.Touba.Scan vector compression/decompression using statistical coding.Proceedings 17th VLSI Test Symposium,1999:114-120.
    [147]PT Gonciari, BM Al-Hashimi,N.Nicolici.Variable-length input huffman coding for system-on-a-chip test. IEEETransactions on Computer-Aided Design Integrated Circuits Systems 2003,22(6):783-796.
    [148]A.Jas, J.Ghosh-Dastidar, Ng Mon-Eng, NA Touba. An efficient test vector compression scheme using selective huffman coding. IEEE Transactions on Computer-Aided Design Integrated Circuits Systems,2003,22(6):797-806.
    [149]X.Kavousianos, E.Kalligeros,D.Nikolos. Test data compression based on variable-to-variable Huffman encoding with codeword reusability. IEEE Transactions on Computer-Aided Design Integrated Circuits Systems,2008,27(7):1333-1338.
    [150]X.Kavousianos, E. Kalligeros, D.Nikolos. Multilevel-Huffman test-data compr-ession for IP cores with multiple scan chains.IEEE Transactions on Very Large Scale Integration (VLSI) Systems,2008,16(7):926-931.
    [151]X.Kavousianos, E.Kalligeros,D.Nikolos. Multilevel Huffman coding:an efficient test-data compression method for IP cores. IEEE Transactions on Computer-Aided Design Integrated Circuits Systems 2007,26(6):1070-1083.
    [152]A.Wuertenberger, CS Tautermann,S.Hellebrand. A hybrid coding strategy for optimized test data compression.Proceedings ITC,2003:451-459.
    [153]M.Tehranipoor, M. Nourani, K.Chakrabarty. Nine-coded compression technique for testing embedded cores in SoCs. IEEE Transactions on Computer-Aided Design Integrated Circuits Systems 2005,13(6):719-731.
    [154]M.Nourani, MH Tehranipour. RL-Huffman encoding for test compression and power reduction in scan applications. ACM Transactions on Design Automation of Electronic Systems,2005,10(1):91-115.
    [155]KJ Balakrishman, NA Touba. Relationship between entropy and test data compression. IEEE Transactions on Computer- Aided Design Integrated Circuits Systems,2006,26(2):386-395.
    [156]W.Zhanglei,K.Chakrabarty.Test data compression for IP embedded cores using selective encoding of scan slices.Proceedings International Test Conference (ITC), 2005,10:.-590.
    [157]Y.Han, Yu Hu, Xiaowei Li, Huawei Li, A.Chandra. Embedded Test Decompre ssor to Reduce the Required Channels and Vector Memory of Tester for Complex Processor Circuit. IEEE Transactions on Very Large Scale Integration (VLSI) Systems, 2007.15(5):531-540.
    [158]EH Volkerink, A.Khoche, M. Subhasish. Packet-based input test data compression techniques. Proceedings ITC,2002:154-163.
    [159]AH El-Maleh. Efficient test compression technique based on block merging. IET Computers Digital Techniques,2008,2(5):327-335.
    [160]B.Koenemann. Care bit density and test cube clusters:multi-level compression opportunities. Proceedings 21st International Conference on Computer Design, 2003:320-325.
    [161]G.Mrugalski,N.Mukherjee,J.Rajski,D.Czysz,J.Tyszer. Compression based on deterministic vector clustering of incompatible test cubes.Proceedings International Test Conference (ITC),2009:1-10.
    [162]I.Hamzaoglu, JH Patel. Test set compaction algorithms for combinational circuits. Proceedings of International Conference on Computer-Aided Design. 1998:283-289.
    [163]J.Lee, NA Touba. Combining linear and non-linear test vector compression using correlation-based rectangular encoding. Proceedings 24th VLSI Test Symposium,2006:252-257.
    [164]X.Kavousianos,E. Kalligeros,D.Nikolos. Optimal Selective Huffman Coding for Test-Data Compression. IEEE Transactions on Computers,2007, 56(8):1146-1152.
    [165]梁华国,蒋翠云.基于交替与连续长度码的有效测试数据压缩和解压.计算机学报,2004,27(4):549-554.
    [166]李国亮,冯建华,崔小乐.基于PTIDR编码的测试数据压缩算法.计算机辅助设计与图形学学报,2008,20(2):161-166.
    [167]欧阳一鸣,肖祝红,梁华国.数据块前相容标记码的测试数据压缩方法.计算机辅助设计与图形学学报,2007,19(8):986-990.
    [168]张念,梁华国,祝沈财,等.基于分组共享种子和位翻转的测试数据压缩方法[J].合肥工业大学学报,2008,31(8):1176-1180
    [169]韩银和,李晓维,徐勇军,等.应用Variable-Tail编码压缩的测试资源划分 方法[J].电子学报,2004,32(8):1346-1350.
    [170]方建平,郝跃,刘红侠,等.应用混合游程编码的SOC测试数据压缩方法.电子学报,2005,33(11):1973-1977
    [171]李建新,梁华国,陶珏辉.基于测试数据分组合并的索引编码压缩方案.计算机工程,2010,36(11),265-267
    [172]周彬,叶以正,李兆麟,吴新春.一种基于TRC-LFSR结构的二维测试向量压缩设计.西安电子科技大学学报,2009,36(5):945-950.
    [173]方昊,宋晓笛,程旭.用扫描链重构来提高EFDR编码的测试压缩率和降低测试功耗.计算机辅助设计与图形学学报,2009,9:1290-1297.
    [174]周彬,叶以正,李兆麟.基于二维测试数据压缩的BIST方案.计算机辅助设计与图形学学报,2009,4:481-486,492.

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