Sigma-Delta调制器及其在混合信号系统中的应用与理论研究
详细信息    本馆镜像全文|  推荐本文 |  |   获取CNKI官网全文
摘要
随着集成工艺的不断提高、数字系统规模不断的增大,各种功能强大的片上系统(System-On-Chip,SOC)不断出现在人们的视野中,人们在对SOC处理性能上提出更高的要求时,也要求这种片上系统能直接处理模拟信号,即产生了混合信号片上系统(Mixed-Signal SOC, MSSOC)。
     以CMOS数字工艺技术实现模拟集成电路是现代大规模SOC研究中的热点和难点,结合过采样技术和噪声整形技术的Sigma-Delta调制方法是解决这种问题的一种有效手段。本文深入研究工作于过采样的Sigma-Delta调制器的原理和设计方法、位流信号直接处理算法、混合信号片上系统的结构和测试。提出了基于过采样技术的Sigma-Delta调制器的混合片上系统,位流信号直接处理结构和新的算法、A/D转换器的测试结构和算法理论。
     论文创新点及主要研究成果概括如下:
     (1)深入研究和建立了开关电容电路的Sigma-Delta调制器的Simulik行为级仿真模型。该模型在建模过程中考虑了各种非理想因素的影响,建模方便,仿真精度比较高,仿真速度快,并且能进行时域噪声仿真。
     (2)研究了3种高性能的Sigma-Delta调制器的实现结构和方法、针对每种调制器电路实现的不足提出了相应的补偿方法和措施。深入研究了高阶Sigma-Delta调制器的变结构分析理论和稳定性的条件,提出了离散变结构系统成为Sigma-Delta调制器的条件和稳定性的验证理论。
     (3)采用0.18um工艺实现了一个16位的Sigma-Delta A/D转换器,完成了电路设计、电路结构选择和版图设计,芯片的测试。
     (4)深入研究了位流信号直接处理的算法、结构和电路实现。提出了一种新的位流加法器、乘法器和由它们组成的基本电路模块及其应用。
     (5)阐述了表征ADC的性能参数和常用的测试方法。提出了基于FFT的谱分析和ADC模型估计的测试方法,实现利用低精度信号源测试高精度的A/D转换器的理论。提出了一种内自测试结构的MSSOC电路,深入研究了基于Sigma-Delta调制技术的内置高精度测试信号源的生成方法。
     本论文的研究达到了预期目标,发展了与CMOS工艺兼容的Sigma-Delta调制器的混合信号片上系统,上述研究成果为实现高精度的混合信号片上系统提供了基础理论和设计依据,具有重大的实践和理论意义。
With digital system scales increase and integrated technology development, the powerful system-on-chip (SOC) has come into our life. When they are created to have high performaces, the SOCs are required the abiltity to process the analog signal directly, that is, the mixed-signal SOC ( MSSOC).
     Realizing the analog integrated circuits with the CMOS digital technology is the hot spot and difficulty in the investigation of the modern large scale SOC. The paper studied deeply the operational principle of Sigma-Delta modulator and its design method, the processing algorithm of bit stream signal, and the structure and test of mixed SOC. The paper proposes a novel mixed SOC based on Sigma-Delta modulator, a new bit-stream signal processing structure and algorithm, and the structure and algorithm to test high precision A/D convertors.
     The significant investigation results of the paper are as follow:
     (1) The behavior simulation model of switched-capacitor Sigma-Delta modulator circuits is investigated deeply and created in simulink. The Sigma-Delta modulator simulation has high precision and fast performance for the nonideal factors being added into the model.
     (2) We study the realizing structure and method of three high performance Sigma-Delta modulators and propose the corresponding measures and method to compensate their realizing lack in circuits. We investigate deeply the variable structure theory to analyze the high-order Sigma-Delta modulator and the stability condition and propose the condition on the discrete varibal structure system being the Sigma-Delta modulator and the theory to test stability.
     (3) We designed a 16-bit Sigma-Delta A/D convertor in 0.18um technology and implemented the circuit design, the circuit structure selecting and the layout design, and the chip test.
     (4) We study deeply the bit-stream processing directly algorithm, its structure and circuits realizaiotn. A novel bit stream adder is proposed in the paper and used to compose other modules such as the multiplier, and its application.
     (5) We introduce the ADC performance parameters and the usual test method. The method of combining FFT spectrum analysis and ADC model is proposed to test the high precision ADC with the low precision stimulus. A novel built-in-self-test SOC circuit is proposed in chapter VI and a high built-in precision stimulus is generated using the Sigma-Delta technology.
     We have obtained the anticipated goal in the paper and implemented the Sigma-Delta Modulator mixed signal SOC in the standard digital CMOS technology. The studied results achieved in the paper are of significance in theory and design method to apply the high precision mixed signal SOC.
引文
[1] R.J Baker, CMOS: mixed-signal circuit design” John Wiley and Sons, Inc (2002)
    [2] 王 新 安 , 吉 利 久 , SOC 测 试 中 BIST 的 若 干 思 考 , 微 电 子 学 与 计 算机,2003,10:41-43.
    [3] John P. Uyemura 著,周润德译,超大规模集成电路与系统导论,北京:电子工业出版社,2003.
    [4] 秦世才,高清运著, 现代集成电子学, 北京:科学出版社,2003.
    [5] 毕查得.拉扎维著,陈贵灿等译.模拟 CMOS 集成电路设计,西安交通大学出版社,2002.
    [6] 谢永乐,系统芯片(SOC)内嵌数字芯核的测试研究[M]:[电子科技大学博士学位论文], 成都:电子科技大学,2003:10-35.
    [7] Y Geerts and M Steyaert, Design of multi-bit delta-sigma A/D converters, Kluwer Academic publishers,(2002).
    [8] 冯晖, 具有高性能的高阶 Sigma-Delta A/D 转换器研究:[上海交通大学博士学位论文], 上海:上海交通大学电路与系统系.2003.
    [9] 黄峰. 一种稳定的高阶Σ-△模/数转换器[J]. 微电子学, 2002,3(2):93-96.
    [10] Schreier R. An empirical study of high-order single-bit delta–sigma modulators[J]. IEEE Trans on Circuits and Systems II: Analog and Digital Signal Processing, 1993,40(2):461-466.
    [11] Schreier R. The Sigma-Delta toolbox for matlab. 2005, http://www.mathworks. com/matlabcentral/fileexchange.
    [12] H. M. Wang, On the stability of third-order Sigma-Delta modulation[J]. IEEE Trans, 1993 , 41(3): 1377-1380.
    [13] 杨士元 . 模拟系统的故障诊断与可靠性设计 [M].北京 : 清华大学出版社 , 1993:1-200.
    [14] 杨士元 . 数字电路的故障诊断与可靠性设计 [M].北京 : 清华大学出版社 , 1989:1-225.
    [15] 张巍,夏立.用 DES 理论测试数模混合电路.系统工程与电子技术[J].2001,23 (10 ): 19-21.
    [16] 颜 学 龙 , 刘 春 江 , 一 谱 分 析 方 法 的 混 合 电 路 BIST[J]. 电 路 与 系 统 学 报 , 2006,11(2):65-69.
    [17] 何蓉晖,李晓维,宫云战, 一种低功耗 BIST 测试产生器方案[J].微电子学与计算机, 2003, 23 :36-40.
    [18] 谢永明,李锐,杨军, 一种基于结构和可测性分析的 BIST 部分扫描算法, 应用科学学报, 2005,23(1):61-66.
    [19] 朱彦卿,何怡刚,阳辉,基于小波变换的 ADC 电流测试方法, 仪器仪表学报, 2006 , 27(2):1609-1614.
    [20] 何怡刚,芦湘冬,刘美容, 基于神经网络数据融合方法的模拟电路故障诊断, 湖南大学学报(自然科学版), 2005,32( 4):47-52.
    [21] 谭阳红 何怡刚.,模拟电路故障诊断的小波方法,电工技术学报,2005,20(8):89-93.
    [22] 程佩青. 数字信号处理教程. 北京:清华大学出版社(第二版)2001, 266-306.
    [23] S K Mitra, “Digital signal processing: A computer-based approach” McGraw-Hill, 2001
    [24] 李罗生,Sigma Delta A/D 转换器和锁相环的设计:[中国科学院博士学位论文], 北京:中国科学院声学研究所,2005.
    [25] KiYoung Nam, Design of Low-voltage L-ow-power Sigma-Delta Modulators for Broadband High-resolution A/D Conversion,:[dissertation]. Stanford Univ. 2004, 30-102.
    [26] Chun Hsien, A Multi-bti Casceded Sigma-Delta Modulator With DAC Error Cancellation Techniques, [dissertation], Texas: Texas Tech Univ.2004,30-80.
    [27] 李拥平, 高性能开关电流存储单元及其 Sigma-Delta 调制器的研究,[中国科学院博士学位论文], 北京:中国科学院半导体研究所,2003.1-50.
    [28] Malcovati P, et. al. Behavioral modeling of switched-capacitor Sigma-Delta modulators. IEEE Trans on Circuits and Systems I: Fundamental Theory and Applications, 2003,50(3): 352-364.
    [29] Hashem Z. H., Izzet kale, Omid S, Modeling of switched-capacitor delta-sigma modulators in simulink, IEEE Transaction on Instrumentation and Measurement, 2005,54(4):1646-1654.
    [30] 云舟工作室,编著,MATLAB 数字建模基础教程,北京:人民邮电出版社,2001.
    [31] 王 玺 , 何 怡 刚 等 ,Σ-? 调 制 器 的 非 理 想 特 性 行 为 级 建 模 与 仿 真 , 微 电 子学,2007,37(1):53-56.
    [32] Richard Schreier,Jesper Steensgaard, Design-Oriented Estimation of Thermal Noise in Switched-Capacitor Circuits, IEEE Trans. Circuits Syst.I,2005,52(11): 2358-2369.
    [33] Emad Hegazi, Member, IEEE, and Nikolaus Klemmer, Senior Member, IEEE, Accurate Modeling of Noise in Switched-C Sigma-Delta Analog-to-Digital Converters, IEEE Trans. Circuits Syst.I,2005,52(11):2319-2327.
    [34] Y. Dong, A. Opal, Time-Domain Thermal Noise Simulation of Switched Capacitor Circuits and Delta–Sigma Modulators, IEEE Trans on Computer-Aided Design of Integrated Circuits and Systems ,2000,19(4):473-481.
    [35] George Suárez, Manuel Jiménez, and Félix O. Fernández, Behavioral Modeling Methods for Switched-Capacitor Sigma-Delta Modulators, IEEE Trans. Circuits Syst.I,2007, 54(6):1236-1254.
    [36] 蔡跃明,沈永朝,陆杰, 1 比特高阶调制器的研究,东南大学学报, 1997, 27(2): 125-128.
    [37] 李宏星,冯晖,林争辉,高阶 Sigma—delta 调制器传递函数设计方法. 微电子学与计算机, 2004, 21(6):147-153.
    [38] Kuo T H, Chen K D and Chen J R. Automatic coefficients design for high-order Sigma-Delta modulators. IEEE Trans on Circuits and Systems II: Analog and Digital Signal Processing, 1999,46(1):6-15.
    [39] Tang Shengxue ,He Yigang, Guo Jierong, Li Hongming, A Novel Design for High-Speed High-Resolution Delta-sigma A/D Converters, microelectronics, 2007.18(6).
    [40] S. M. Moussavi and B. H. Leung, High-order single-stage single-bit oversampling A/D converter stabilized with local feedback loops, IEEE Trans. Circuit Syst. 1994,41(2):19-25.
    [41] N. A. Fraser and B. Nowrouzian, A novel highly stable high-resolution oversampled Σ-? A/D converter configuration, IEEE Trans. Circuit Syst. 41(2),2001: 3909-3912.
    [42] V. Mladenov and H. Hegt et al. On the Stability Analysis of High Order Sigma-Delta modulators, Analog Integrated Circuits and Signal Processing, 2003,36, 47–55.
    [43] S. M. Moussavi and B. H. Leung, High-order single-stage single-bit oversampling A/D converter stabilized with local feedback loops, IEEE Trans. Circuit Syst. II, 1994,41:19-25.
    [44] N. A. Fraser and B. Nowrouzian, A novel highly stable high-resolution oversampled Σ-? A/D converter configuration, IEEE Trans. Circuit Syst. II, 2001, 41:3909-3912.
    [45] H. M. Wang, On the stability of third-order Sigma-Delta modulation, IEEE Trans. 1993, 41: 1377-1380.
    [46] V. Mladenov and H. Hegt, et al, On the Stability Analysis of High Order Sigma-Delta modulators, Analog Integrated Circuits and Signal Processing,2003,36:47–55.
    [47] P. Steiner and W. Yang, A framework for analysis of high-order Sigma-Delta modulators. IEEE Transactions on Circuits and Systems II: 1997,44: 1–10.
    [48] Chao K C, Lee S W and Sodini C G. A higher order topology for interpolative modulators for oversampling A/D converters. IEEE Trans on Circuits and Systems,1990,37(3): 309-318.
    [49] S. Plekhanov and I. A. Shkolnikov et al., High order Sigma-Delta modulator design via sliding mode control, IEEE Proc. 2003: 897-902
    [50] Z.Samsarpturk and Y. Istefanopulos, On the Stability of Discrete-Time Sliding Mode Control Systems,IEEE Transactions on Automatic Control. 1987,32(10).
    [51] S.K. Spurgeon, Sliding Mode Control Design for Uncertain Discrete-time Systems, Proceedings of the 30th Conference on Decision and Control. 1991.
    [52] Shiang-Hwua Yu, Analysis and Design of Single-Bit Sigma-Delta Modulators Using the Theory of Sliding Modes, IEEE Trans, Control Systems Technology, 2006, 14(2):336-346.
    [53] Tang Shengxue ,He Yigang, Interpolative Sigma-Delta Modulator Analysis Based On Variable Structure Control,ICSCA2006,chongqing,2006.
    [54] Sangwook Kim, Design of the Third Order Cascaded Sigmd-delta Modulator for Switched-capacitor Applications: [dissertation]. Arizona: Arizona state Univ, 2004, 35-89.
    [55] L. Williams and B. Wooley, Third-order cascaded Sigma-Delta modulators, IEEE Trans. on Circuits and Systems II, 1991,38: 489-498.
    [56] Y. Yang, R. Schreier,G. C. Temes, and S. Kiaei, On-line adaptive digital correction of dual-quantization delta-sigma modulators, Electron. Letters, 1992,28(16):1511–1513.
    [57] G Cauwenberghs, G. C. Temes, Adaptive Digital Correction of Analog Errors in MASH ADC’s—Part I: Off-Line and Blind On-Line Calibration, IEEE Trans on Circuits and Systems II: Analog and Digital Signal Processing,, 2000, 47(7):621-628.
    [58] P Kiss, J Silva, A Wiesbauer, Adaptive Digital Correction of Analog Errors in MASH ADC’s—Part II: Correction Using Test-Signal Injection, IEEE Trans on Circuits and Systems II: Analog and Digital Signal Processing, 2000,47(7):629-639.
    [59] Monica Finsrud, Mats H?vin, and Tor Sverre Lande, Member, IEEE, Adaptive Correction of Errors in Second-Order Sigma-Delta MASH Solution, IEEE Trans.Circuits Syst. II, 2001,48(11):1005-1014.
    [60] 龚耀寰著,自适应滤波器-时域自适应滤波和智能天线,北京:电子工业出版社,2003.
    [61] I Fujimori, A Nogi, Tetsuro Sugimoto, A Multibit Delta–Sigma Audio DAC with 120-dB Dynamic Range, IEEE Journal of Solid-state Circuits, 2000, 35(8):1066-1074.
    [62] A.A. Hamoui, K.W Martin, High-Order Multibit Modulators and Pseudo Data-Weighted- Averaging in Low-Oversampling ADCs for Broad-Band Applications, IEEE Trans, 2004, 51(1):72
    [63] Eric Fogleman, I Galton, A Dynamic Element Matching Technique for Reduced-Distortion Multibit Quantization in Delta–Sigma ADCs, IEEE Trans on Circuits and Systems II: Analog and Digital Signal Processing, 2001, 48( 2):158-171.
    [64] D.M. Hummels, D. Gerow, F.H.Irons, A compensation technique for Sigma-Delta analog-to-digital converter, IEEE Instrumentation and Measurement Technology Conference, 1997, 1309-1312.
    [65] Safi-Harb M and Roberts G W. Low power delta–sigma modulator for ADSL applications in a low-voltage CMOS technology. IEEE Trans on Circuits and Systems I,2005,52(10): 2075-2089.
    [66] L.B Yao, Michiel S. J, A 1-V 140-uW 88-dB Audio Sigma-Delta Modulator in 90-nm CMOS, IEEE Journal of Solid-state Circuits, 2004,39(11):1809-1819.
    [67] P Balmelli, Q Huang, A 25-MS/s 14-b 200-mW Sigma–Delta Modulator in 0.18-um CMOS, IEEE JOURNAL OF SOLID-STATE CIRCUITS, 2004, 39(12): 2161-2170.
    [68] A.M. Marques,V. Peluso, et al, A-15-b Resolution 2-MHz Nyquist Rate Sigma-Delta ADC in a 1-um CMOS Technology, IEEE Journal of Solid-state Circuits,1998, 33(7):1065-1075.
    [69] H Lampinen, O Vainio, An Optimization Approach to Designing OTAs for Low-Voltage Sigma–Delta Modulators, IEEE Transaction on Instrumentation and Measurement, 2001,50(6):1665-1672.
    [70] 李桂宏, 谢世健著, 集成电路设计宝典, 北京:电子工业出版社, 2006.
    [71] J Candy, G Themes, Oversampling Delta-sigma Data Converters, New York, IEEE Press,1992.
    [72] Wong, P. W., Gray, R. M., FIR filters with Sigma-Delta modulation encoding’. IEEE Transactions on Signal Processing, 1990, 38(6): 979-990.
    [73] David, A., David, M. L., Design and analysis of delta-digma based IIR filters’. IEEE Transactions on on Circuits and Systems-II: Analog and Digital Signal Processing, 1993, 40( 4),:233-240.
    [74] M.K Kurosowa, M Kawakam, et al. Single-bit digital processing for current control of brushless DC motor, IEE Proc-Control conference, 2002:589-595
    [75] Oleary, P., Malobetti, F., Bit Stream adder for oversampling coded data’. Electronic letters, 1990, 26(20) :1708- 1709.
    [76] A C Thompson, P Shea, Z M Hussain, et al. Efficient single-bit ternary digital filtering using Sigma-Delta modulator. IEEE Signal Processing Letters, 2004,11( 2):164-166.
    [77] Wu, X., Goodall, R. M., One-bit processing for digital control, IEE Proc-Control Theory Appl, 2005, 152,( 4):403-410.
    [78] Fujisaka. H., Kurata,R., Sakamoto, M., and Morisue,M, Bit-stream signal processing and its application to communication systems, IEE Proc.-Circuits Devices Syst., 2002, 149, (3): 159-166.
    [79] 刘丛伟,李崇坚,韦立祥,等. 基于拼图方式的电力电子电机系统通用仿真软件包. 中国电机工程学报,1999,19(3):37-40.
    [80] Liu congwei, Li chongjian, Wei lixiang, et al. Software package for general purpose simulation of power electronic and electric machine system based on visual link method[J]. Proceeding of the CSEE, 1999,19(3):37-40.
    [81] 张涛,蒋静平,张国宏. 交流永磁同步电机伺服系统的线性化控制. 中国电机工程学报,品 2001, 21(6):40-43.
    [82] Aminian M, Aminian F. Neural-network based analog circuit fault diagnosis using wavelet transform as preprocessor. IEEE Trans. Circuits. Syst.-II, 2000, 44(3):151~156.
    [83] Aminian F, Aminian M, Collins H W. Analog fault diagnosis of actual circuits using neural networks. IEEE Trans.Instrum.Meas, 2002, 51(3):544~550.
    [84] Y. He, Y. Tan and Y. Sun. “Wavelet neural network approach for fault diagnosis of analogue circuits” IEE Proc.-Circuits Devices Syst., Vol. 151, No. 4, August 2004:379-384.
    [85] Michael F. Toner and GordonWRoberts. A BIST Scheme for a SNR, Gain Tracking and Frequency Response Test of a Sigma-Delta ADC. IEEE Transactions on Circuits,and System-II: Analog and Digital Signal Processing, 1995, 42(1):1-15
    [86] Michael F. Toner and GordonW Roberts. A BIST Scheme for an SNR Test of aSigma-Delta ADC. IEEE International Test Conference, 1993: 805-814
    [87] Michael F. Toner and Gordon W. Roberts. A BIST Technique for a Frequency Response and Intermodulation Distortion Test of a Sigma-Delta ADC. Proc. IEEE VLSI Test Symposium, 1994: 60-65
    [88] 李杰,杨军,李锐,一种实现数模混合电路中 ADC 测试的 BIST 结构, 微电子学, 2004, 34(4) :466-468.
    [89] 张金林,陈朝阳,沈绪榜, 一种有效的双矢量测试 BIST 实现方案, 微电子学与计算机, 2004,2l(4):116-121.
    [90] 陈列, 颜学龙. MADBIST 系统中正弦信号发生器的设计与仿真. 半导体技术, 2003, 28(8): 18-21.
    [91] Sunil R. Das, Jila Zakizadeh, et al, Testing Analog and Mixed-Signal Circuits With Built-In Hardware-A New Approach, IEEE Transaction on Instrumentation and measurement , 2007,56(3) : 840-855.
    [92] Niclas Bj?rsell, Peter H?ndel, Histogram Tests for Wideband Applications, IEEE Transaction on Instrumentation and measurement , 2008,57(1) :70-75.
    [93] Jerome J. Blair, Selecting Test Frequencies for Sinewave Tests of ADCs, 2005 ,73-78. IEEE Transaction on Instrumentation and measurement , 2005,54(1) :70-75.
    [94] Francisco Corrêa Alegria, António Cruz Serra, Standard Histogram Test Precision of ADC Gain and Offset Error Estimation, IEEE Transaction on Instrumentation and measurement , 2007,56(5) : 1527-1531.
    [95] I Kollár, J Blair, Improved Determination of the Best Fitting Sine Wave in ADC Testing, IEEE Transaction on Instrumentation and Measurement, 2005,54( 5):1978-1983.
    [96] F Adamo, F Attivissimo, N Giaquinto, FFT Test of A/D Converters to Determine the Integral Nonlinearity, IEEE Transaction on Instrumentation and Measurement, 2002, 51(5):1050-1054
    [97] Maria d, Marcelo N, Luigi C. INL and DNL Estimation Based on Noise for ADC Test,IEEE Tranctions on Instrumentation and measurement, 2004,53(5).
    [98] F Attivissimo, N Giaquinto, I Kale, INL Reconstruction of A/D Converters via Parametric Spectral Estimation, IEEE Transaction on Instrumentation and Measurement, 2004, 53( 4) :940-946.
    [99] C.Kian Ong, K.T. Cheng, L. Wang, A New Sigma-Delta Modulator Architecture for Testing Using Digital Stimulus, IEEE Transactions on Circuits and Systems I: REGULAR PAPERS, 2004,51(1):206-214.
    [100] B Dufort, Gordon W. Roberts. On-Chip Analog Signal Generation for Mixed-Signal Built-In Self-Test . IEEE Journal of Solid-State Circuits, 1999, 34(3):318-330.
    [101] X Haurie, W. Roberts. Arbitrary-Precision Signal Generation for Mixed-Signal Built-In-Self-Test. IEEE Trans, Circuits Sys, 1998,45(11):1425-1432.
    [102] A. K. Lu, G. W. Roberts, and D. A. Johns, A high-quality analog oscillator using oversampling D/A conversion techniques, IEEE Trans. Circuits Syst. II, 1994, 41: 437–444.
    [103] C. Rebai, Dominique Dallet, Signal Generation Using Single-Bit Sigma-Delta Techniques, IEEE Transaction on Instrumentation and measurement , 2004,53(4):1240-1244.
    [104] W.B. Lin, B.D. Liu, Multitone signal generator using noise-shaping technique, IEE Proc.-Circuits Devices Syst., 2004,151(1),:25-30.
    [105] Benoit Provost. On-chip ramp generators for mixed-signal BIST and ADC self-test[J]. IEEE Journal of Solid-State Circuits,2003,38(2):263-273.
    [106] A. K. Lu, G W. Roberts. An Oversampling-Based Analog Multitone Signal Generator. IEEE Transactions on Circuits and System-II: Analog and Digital Signal Processing,1998, 45 (3): 391-394.
    [107] 王秋生,王祁,孙圣和,直接数字合成调频信号的研究,仪器仪表学报,2000, 21(4):428-430.
    [108] Vankka, J. Lindeberg, J. Halonen, K, Direct digital synthesizer with tunable phase and amplitude error feedback structures, IEE Proc.-Circuits Devices Syst., 2004,151(6), 353-370
    [109] 钱静洁,张建秋, 基于高阶 Sigma-Delta 调制的数字波合成方法, 传感技术学报, 2005, 18(4): 931-934.
    [110] 唐圣学, 何怡刚, 黄姣英, 基于噪声整形时分复用技术的多谐信号源研究, CTC06, 北戴河.

© 2004-2018 中国地质图书馆版权所有 京ICP备05064691号 京公网安备11010802017129号

地址:北京市海淀区学院路29号 邮编:100083

电话:办公室:(+86 10)66554848;文献借阅、咨询服务、科技查新:66554700