基于DSP的单相PFC控制器的研究
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摘要
从电网获取交流电经整流后为设备提供直流电是电力电子技术中应用极为广泛的一种整流方案,然而由这种整流方案设计的电路使输入电流产生严重的畸变,其谐波电流严重污染了电网,输入端功率因数大大下降。随着IEC1000-3-2等国际标准的颁布和强制执行,功率因数校正(PFC)技术已成为电力电子领域的一个研究热点。
     本文在平均电流模式控制的有源功率因数校正技术的基础上,设计了一种控制电路基于数字信号处理器(DSP)、主电路采用Boost变换器拓扑结构的全数字单相功率因数校正器,用数字电路代替传统的模拟电路来实现对整个回路的控制,最终使得校正器具有输入功率因数接近于1、低电流谐波以及高转换效率的特性。
     PFC系统的控制电路采用电流环与电压环双闭环控制结构,控制算法采用传统的PI算法。文中对PFC电路的小信号模型进行了研究,并建立了系统的简化平均小信号模型,在此基础上,以系统的动态特性和稳定性为设计指标,具体给出了双闭环系统中PI调节器的设计方法。此外,本文对电压与电流的采样算法
    
     西安理工大学硕士学位论文
    也进行了研究。
     实验样机主要由主电路、控制电路和辅助电源电路等三部分组成。主电路来
    用B。。St变换器拓扑结构;控制电路主要由核处理器ADSP、21065L、Al3转换器
    和实现DPWM及地址解码功能的CPLD等器件组成;辅助电源电路为控制电路
    中各器件提供工作电压。
     软件系统由初始化模块、PI算法模块、软启动算法模块、采样算法模块、中
    断子程序模块等几个可以实现独立功能的模块组成,这些功能模块在主程序的控
    制连接下,实现了一个完整的系统。这种软件系统不仅使程序简洁、易读,而且
    更便于系统的升级。
     本文的设计思想与相关结论经仿真与实验得到验证。
The rectifier scheme that direct current supplying with power electronic equipment is obtained by alternating current being rectified is widely applied in power electronics field. However, the rectifying circuits result in input current distortion, input power factor greatly decrease. With promulgation and obliging actualization of IEC 1000-3-2 etc. international standards, Power Factor Correction (PFC) technique become a hotspot of research in power electronics field.
    Based on average current mode, the paper introduce the design and implementation of a fully digital controlled single-phase boost power factor corrector with fast response . The control-loop circuit is realized using digital control and the corrector can tend to unity power factor, lower current harmonics and high transfer efficiency.
    The double closed-loops framework is applied in the PFC control circuit and the PI algorithm is adopted as system' s control algorithm. The paper research small-signal model of PFC circuit and build the
    
    
    
    simplified average-small-signal model of the system. The thesis develop design method of PI regulators which are applied in double closed-loops system. Furthermore, the sampling algorithm of votage and current variables is also analysed in this paper.
    The prototype include three parts. The main circuit adopt Boost converter topology; the control circuit is made up of ADSP-21065L core processor, A/D converter and CPLD which realize the functions of Digital Pulse Width Modulation(DPWM) and address decoding; the auxiliary power supply afford work voltage of every device.
    The software system consist of some software modules which realizing independent functions, such as initialization module, PI algorithm module, sampling algorithm module and interrupt module. Under connection of the main program, these modules realize an integrated system.
    All design thoughts and theoretical results are verfied by experiments on prototype.
引文
[1] 张占松,蔡宣三编著.开关电源的原理与设计.北京:电子工业出版社,1992.
    [2] 谢力华,苏彦民.正弦波逆变电源的数字控制技术.电力电子技术,1.5(6),2001:52-56.
    [3] Mohan N, Uneland T M, Robbins WP. Power Electronics. 2nd edition,John Wiley&Sons, Inc., 1995.
    [4] P.C. Todd. UC3854 Controlled Power Factor Correction Circuit Design .Application Note U-134, Power Supply Control Products Data Book. Texas Intruments., 2001.
    [5] L.H. Dixon. Average Current-Mode Control of Switching Power Supplies. Unitrode Power Supply Design Seminar Handbook, 1990.
    [6] R. B. Ridely. Average Small-Signal Analysi of the Boost Power Factor Correction Circuit. Virginia Power Electronics Center Seminar (VPEC), 1989: 108-120.
    [7] W. Tang, Fred C. Lee, Raymond B. Ridely. Small-Signal Modeling of Average Current Mode Control . IEEE Trans.on Power Electronics, Vol: 8, No. 2,1993:112-119.
    [8] Raymond B. Ridely. A New Continous-Time Model for Current Model Control. IEEE Trans. on Power Electronics, Vol: 6, No. 2, 1991: 271-280.
    [9] P. Tenti, G. Spiazzi. Harmonic Limiting Standards and Power Factor Correction Techniques. 6th European Conference on Power Eelctronics and Applications (EPE) 1995: 0-144.
    [10] G. Spiazzi,P. Mattavelli,L. Rossetto. Power Factor Preregulator
    
    With Improved Dynamic Response.IEEE Power Electronics Specialists Conference (PESC), Vol: 12, 1995: 150-156.
    [11] C. Zhou, M. M. Jovanovic. Design Trade-Offs in Continuous Current-Mode Controlled Boost Power Factor Correction Circuit. High Frequency Power Conference. Proc. (HFPC), 1992: 209-220.
    [12] J. B. Williams. Design of Feedback Loop in Unity Power Factor AC to DC Converter. Power Electronics Specialists Conference (PESC),1989: 959-967.
    [13] G. Spiazzi, P. Mattavelli, L. Rossetto. Methods to Improve Dynamic Response of Power Factor Preregulators: an Overview. European Power Electronics Conf.(EPE), Sevilla, Spain, 1995:754-759.
    [14] L. Rossetto, O. Spiazzi, P. Mattavelli. Control Techniques for Power Factor Correction Converters.Proc. of Power Electronics Motion Control (PEMC), 1994:1310-1318.
    [15] 陆治国编.电源的计算机仿真技术.北京:科学出版社,2001.
    [16] 苏涛,吴顺君,廖小群编著.高性能数字信号处理器与高速实时信号处理.西安:西安电子科技大学出版社,1999.
    [17] 吴敏渊,金伟正,胡志雄,黄建忠编著.ADSP系列数字信号处理器原理.北京:电子工业出版社,2002.
    [18] 胡寿松 主编.自动控制原理.北京:国防工业出版社,1994.
    [19] Power System Simulink Blockset. User's Guide Version 1,Matlab 6.1. Math Works.
    [20] ADSP-21065L SHARC User' s Manual. Analog Devices September 8, 1998.
    [21] ADSP-21065L SHARC Technical Reference. Analog Devices Inc.,September 8, 1998.
    
    
    [22] DSP Microcomputer ADSP-21065L Data Sheet. Analog Devices Inc.,2000.
    [23] 4-Channel, Simultaneous Sampling, High Speed, 12-Bit ADC AD7864-2 Data Sheet. Analog Devices Inc., 1999.
    [24] MAX 3000A Programmable Logic Device Family Data Sheet. Altera Corporation, Version 2.1, October, 2001.
    [25] Jinhai Zhou, Zhengyu Lu. Novel Sampling Algorithm for DSP Controlled 2KW PFC Converter. IEEE Trans on Power Electronics, Vol: 16, No. 2, 2001: 217-222.
    [26] David M. Van de Sype, Koen De Gusseme. A Sampling Algorithm for Digitally Controlled Boost PFC Converters. IEEE PESC, Vol: 4, 2002: 1693-1698.
    [27] David Van de Sype. Digital Control of Boost Power Factor Preregulator: Sampling. RUG-FTW, 2nd PhDSymposium December 12, 2001: 1-2.
    [28] I. Ahmed. Implementation of PID and Deadbeat Controllers with the TMS320 Family. Application Report SPRA083, Texas Instruments, Dallas, TX.
    [29] Aleksander Prodic, et al. Digitally Controlled Low-Harmonic Rectifier Having Fast Dynamic Responses.IEEE 2002: 476-482.
    [30] S. Buso,P. Mattaveli. Simple Digital Control Improving Dynamic Performance of Power Factor Preregulator. IEEE Trans. on Power Electronics Vol:13, 1997: 814-823.
    [31] P. Murchy, M. Xie, F. Lee et al. Study of Digital Vs Analog Control. Center of Power Electronics Systems (CPES),Seminar Proceedings, 2002: 203-206.
    [32] Y. Duan, H. Jin. Digital Controller Design for Switch Mode
    
    Power Converters. IEEE Applied Power Electronics Conference and exposition (APEC), Vol: 2, 1999: 480-484.
    [33] M. Fu, Q. Chen. A DSP Based Controller for Power Factor Correction (PFC) in a Rectifier Circuit. IEEE APEC, Vol:l,2001:144-149.
    [34] David Van de Sype. Reducing Input Current Harmonics using Digital Control Loops in Power Factor Correction Circuits. RUG-FTW, 1st PhD Symposium December 5, 2000.
    [35] Koen De Gusseme. Control Active Power Factor Correction Converters. RUG-FTW, 2nd PhD Symposium December 12, 2001.
    [36] Koen De Gusseme, David Van de Sype, et al. Design Issues for Digital Control of Boost Power Factor Correction Converters . IEEE ISIE, Vol: 3, 2002: 731-736.
    [37] A.H. Mitwalli, S. B. Leeb, et al. An Adaptive Digital Controller for aUnity Power Factor Converter. IEEE Trans. on Power Electronics, Vol: 11, No. 2, 1996: 374-382.
    [38] S. Bibian, H. Jin. Digital Control With Improved Performance for Boost Power Factor Correction Circuits. IEEE APEC, Vol:1, 2001: 137-143.
    [39] Aleksandar Prodic, Dragan Maksimovic, et al.Design and Implementation of a Digital PWM Controller for a High-Frequency Switching DC-DC Power Converter. IEEE IECON 2001:893-898.
    [40] Applications Brief BR1557/D. The Single-Phase Indirect Digital Power Factor Correction using Motorola DSP5680x. Preliminary Information, Motorola.
    [41] Applications Brief BR1550/D. The Single-Phase direct
    
    Digital Power Factor Correction using Motorola DSP5680x. Preliminary Information, Motorola.
    [42] De Marl Yves.Easy Power Factor Correction Using A DSP. Motion Control Group, Milan Lab. Analog Device Inc.
    [43] A.V. Peterchev, S.R. Sanders.Quantization Resolution and Limit Cycling in Digital Controlled PWM Converters.IEEE PESC,Vol:2, 2001: 465-471.
    [44] Wu.A.M, Jinwen. Xiao, et al. Digital PWM Control: Application in Voltage Regulation Modules. IEEE PESC, Vol: 1, 1999: 77-83.
    [45] Gary Lawman. Pulse-Width Modulation in Xilinx Programmable Logic. Application Brief, April 11, 1995.
    [46] Ivan Celanovic. A Distributed Digital Control Architecture for Power Electronics Systems. Paper for Maste of Science in Electrical Engineering, Virginia Polytechnic Institute and State University, July 20, 2000.
    [47] Sangsun Kim, Dr. P. Enjeti. Digital Control of Switching Power Supply Power Factor Correction Stage.Seminar Power Electrnoics and Power Quality Laboratory Texas A&M University.
    [48] G. Spiazzi, P. Mattavelli, L. Rossetto, Application of Sliding Mode Control to Switchn-Mode Power Supplies. Journal of Circuits,Systems and Computers(JCSC),Vol:5,No. 3,September 1995: 337-354.
    [49] Zaohong Yang, Paresh C. sen. A Novel Technique to Achieve Unity Power Factor and Fast Transient Response in AC-to-DC Converter. IEEE Tranc. on Power Elec,Vol:16, No. 6,2001:137-143.
    [50] Jian Sun. Demystifying Zero-Crossing Distortion in Single Phase PFC Converters. IEEE PESC, Vol:3,2002:1109-1114.