摘要
本论文设计了一个2.4GHz的射频前端零中频接收机。零中频接收机包含低噪声放大器和混频器，其中混频器的本振输入由压控震荡器提供。其中低噪声放大器结构是全差分的形式，仿真结果显示LNA可以达到17.7 dB的增益，1.8dB的IIP3，-11.6 dB的1 dB压缩点、2.7 dB的噪声系数和18mW的功耗。混频器是双平衡形式混频器，使用交叉差分管对作为输入级来提高线性，除此之外，为提高增益，使用电流源负载和共模反馈电路。该混频器经仿真，在3V电压下，取得三阶输入截止点(IIP3)为11.8dbm，转换电压增益为10 db，功耗为12mW的较好结果。本论文电路使用Cadence公司的EDA工具SpectreRF及TSMCO.18RF CMOS工艺库来验证。
This thesis presents a 2.4GHz RF front-end receiver. It designed to be used in a Zero-IF architecture. The Zero-IF receiver includes differential-end low noise amplifiers(LNA) and doubled-balanced mixers,which LO input is come from VCO. The LNA has 17.7 dB gain, 1.8dB IIP3, -11.6 dB P_(1dB), 2.7dB NF and 18mW power consumption. The mixer shows 11.7 dB IIP3, 10 dB conversion gain, 12mW power consumption. The schematics of the front-end are all simulated by EDA tools Cadence's SpectreRF with TSMC0.18RF CMOS technology.
引文
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