摘要
当前中国正在大力推行数字电视和数字电视网络双向改造,在此基础上,构建基于广电网络的IPTV技术已经受到了广电部门的高度重视,本文研究的课题IPQAM技术正是构建广电IPTV的一种关键技术。
本文主要研究了IPQAM系统中物理层的FPGA设计与实现。
首先,本文对IPQAM系统进行了概述,还介绍了MPEG-2 TS流相关的技术标准和本课题组设计的IPQAM系统的总体功能框架。
详细研究了IPQAM系统中物理层的FPGA实现,在IPQAM系统中的物理层采用的是DVB-C物理层标准。本文利用“串并转换思想”设计实现了DVB-C标准中的能量扩散模块,此算法大大降低了前后接口的复杂度,提高了系统的吞吐量;利用多项式相乘原理实现了伽罗华域乘法器,并且以此为基础实现了RS编码,还分析了RS编码对FPGA中逻辑资源的消耗情况;利用双口RAM实现了卷积交织编码。针对DVB-C标准中的要求,本文还提出并实现了可以兼容16QAM,32QAM,64QAM,128QAM和256QAM这5种调制方式的字节变换、差分编码。并且针对FPGA内部RAM资源的特点设计了I、Q符号存储表,使其对资源的消耗比较小,针对存储表的特点设计了一种兼容16QAM,32QAM,64QAM,128QAM和256QAM这五种方式的符号映射模块。
最后还从课题中的实际系统出发对物理层的数据流控制进行了分析,设计和实现了能够正常运用在IPQAM系统的数据流接口。
The Government is carrying out Digital Television and Bidirectional Transformation of Digital Television Network, and the interactive personal television (IPTV) over Digital Televison Network is becoming more and more important for the Government. The IPQAM which is researched in this thesis is a pivotal technology for interactive personal telsvision over Digital Television Network.
This article researches the design and implement of Physical Layer of IPQAM.
Firstly,the IPQAM and the stardard of MPEG-2 transport stream are introduced.And the structure of IPQAM which is presented by our team is analyzed.
The implement of Physical Layer adopting DVB-C standard in FPGA is hardly researched.Then using the idea of "series to parallel" to design and implement Randomiza- tion module,using this arithmetic can greatly reduce the complexity of interface which connects to randomization module, and also increase the data throughput of the IPQAM system. Using the theory of polynomial multiplier to implement of Galois field multiplier,and using this multiplier to design RS encoder,the resource of RS encoder in FPGA is analyzed.And convolutional interleaver is also designed. Byte to m-tuple conversion、Differential encoding and Symbol mapping are also implemented,and in our design ,it is compatible with 16QAM, 32QAM, 64QAM, 128QAM and 256QAM.In this part, we design a storage table to store symbols of I and Q which can greatly reduce the RAM resource in FPGA.
Finally, the data control of IPQAM Physical Layer is analyzed, and a good design of data control which can be well used in IPQAM is implemented.
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