Multilevel Resistive Switching in Planar Graphene/SiO2 Nanogap Structures

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• 作者：Congli He ; Zhiwen Shi ; Lianchang Zhang ; Wei Yang ; Rong Yang ; Dongxia Shi ; Guangyu Zhang
• 刊名：ACS Nano
• 出版年：2012
• 出版时间：May 22, 2012
• 年：2012
• 卷：6
• 期：5
• 页码：4214-4221
• 全文大小：557K
• 年卷期：v.6,no.5(May 22, 2012)
• ISSN：1936-086X

文摘

We report a planar graphene/SiO₂ nanogap structure for multilevel resistive switching. Nanosized gaps created on a SiO₂ substrate by electrical breakdown of nanographene electrodes were used as channels for resistive switching. Two-terminal devices exhibited excellent memory characteristics with good endurance up to 10⁴ cycles, long retention time more than 10⁵ s, and fast switching speed down to 500 ns. At least five conduction states with reliability and reproducibility were demonstrated in these memory devices. The mechanism of the resistance switching effect was attributed to a reversible thermal-assisted reduction and oxidation process that occurred at the breakdown region of the SiO₂ substrate. In addition, the uniform and wafer-size nanographene films with controlled layer thickness and electrical resistivity were grown directly on SiO₂ substrates for scalable device fabrications, making it attractive for developing high-density and low-cost nonvolatile memories.

Keywords:

nanographene; electronic devices; resistive switching; multilevel memory