High-Performance CdSe:In Nanowire Field-Effect Transistors Based on Top-Gate Configuration with High-κ Non-Oxide Dielectrics

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• 作者：Zhubing He ; Wenjun Zhang ; Wenfeng Zhang ; Jiansheng Jie ; Linbao Luo ; Guodong Yuan ; Jianxiong Wang ; C. M. L. Wu ; Igor Bello ; Chun-Sing Lee ; Shuit-Tong Lee
• 刊名：Journal of Physical Chemistry C
• 出版年：2010
• 出版时间：March 18, 2010
• 年：2010
• 卷：114
• 期：10
• 页码：4663-4668
• 全文大小：266K
• 年卷期：v.114,no.10(March 18, 2010)
• ISSN：1932-7455

文摘

A dual-gate field-effect transistor (FET) based on the same single indium-doped CdSe nanowire using Si₃N₄ and SiO₂ as top- and back-gate dielectrics, respectively, was fabricated. This dual-gate FET enabled direct comparison of the device performance of FETs in both top- and back-gate configurations. Remarkably, the field-effect mobility, peak transconductance, and I_on/I_off ratio of the Si₃N₄ top-gate FET were 52, 142, and 2.81 × 10⁵ times larger than the respective values of the SiO₂ back-gate FET. Meanwhile, the threshold voltage and the subthreshold swing of the top-gate FET decreased to −1.7 V and 508 mV/decade, respectively, which are better than the best values ever obtained in FETs based on II−VI semiconductor nanomaterials including CdSe nanowires. The roles of device configurations and gate materials in the FET characteristics and the evaluation of electronic and transport properties of nanostructures based on that were discussed. Two kinds of basic logic circuits, “AND” and “OR”, were constructed with the top-gate transistors, which could also utilize light-input to realize a phototransistor action to take advantage of its photoresponse properties.