文摘
Copper/SiOb>2b>/Si metal-oxide-semiconductor (MOS) devices both with and without a MnSiOb>3b> barrier layer at the Cu/SiOb>2b> interface have been fabricated in an ultrahigh vacuum X-ray photoelectron spectroscopy (XPS) system, which allows interface chemical characterization of the barrier formation process to be directly correlated with electrical testing of barrier layer effectiveness. Capacitance voltage (CV) analysis, before and after tube furnace anneals of the fabricated MOS structures showed that the presence of the MnSiOb>3b> barrier layer significantly improved electric stability of the device structures. Evidence of improved adhesion of the deposited copper layer to the MnSiOb>3b> surface compared to the clean SiOb>2b> surface was apparent both from tape tests and while probing the samples during electrical testing. Secondary ion mass spectroscopy (SIMS) depth profiling measurements of the MOS test structures reveal distinct differences of copper diffusion into the SiOb>2b> dielectric layers following the thermal anneal depending on the presence of the MnSiOb>3b> barrier layer.