Single InAs/GaSb Nanowire Low-Power CMOS Inverter
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- 作者：Anil W. Dey ; Johannes Svensson ; B. Mattias Borg ; Martin Ek ; Lars-Erik Wernersson
- 刊名：Nano Letters
- 出版年：2012
- 出版时间：November 14, 2012
- 年：2012
- 卷：12
- 期：11
- 页码：5593-5597
- 全文大小：295K
- 年卷期：v.12,no.11(November 14, 2012)
- ISSN：1530-6992
文摘
III鈥揤 semiconductors have so far predominately been employed for n-type transistors in high-frequency applications. This development is based on the advantageous transport properties and the large variety of heterostructure combinations in the family of III鈥揤 semiconductors. In contrast, reports on p-type devices with high hole mobility suitable for complementary metal鈥搊xide鈥搒emiconductor (CMOS) circuits for low-power operation are scarce. In addition, the difficulty to integrate both n- and p-type devices on the same substrate without the use of complex buffer layers has hampered the development of III鈥揤 based digital logic. Here, inverters fabricated from single n-InAs/p-GaSb heterostructure nanowires are demonstrated in a simple processing scheme. Using undoped segments and aggressively scaled high-魏 dielectric, enhancement mode operation suitable for digital logic is obtained for both types of transistors. State-of-the-art on- and off-state characteristics are obtained and the individual long-channel n- and p-type transistors exhibit minimum subthreshold swings of SS = 98 mV/dec and SS = 400 mV/dec, respectively, at Vds = 0.5 V. Inverter characteristics display a full signal swing and maximum gain of 10.5 with a small device-to-device variability. Complete inversion is measured at low frequencies although large parasitic capacitances deform the waveform at higher frequencies.