This study investigates the changes in copper extrusion and induced voiding that result from different annealing temperatures. Round TSVs 鈭?5xA0;渭m deep and 4-5xA0;渭m in diameter were filled with copper by electrochemical deposition (ECD), followed by chemical mechanical polishing and pre-annealing to 150xA0;掳C for one hour. Based upon the material properties of TSVs, the high density copper absorbs photon energy more strongly than silicon or air. This results in good contrast within the copper-filled vias when X-ray micrographs are taken and allows voids within the material to be seen. A lab-based X-ray microscope with 8xA0;Kev X-ray energy allows a penetration of 鈭?0xA0;渭m into the silicon. Consequently, sample preparation requires wafers to be backside polished from an initial thickness of 775xA0;渭m to <50xA0;渭m. When scanned with a lab-based X-ray microscope, a set of TSVs is imaged and the 3D X-ray tomography shows voids or seamlines at the bottom of the TSVs. This sample was annealed to 225xA0;掳C and 300xA0;掳C, respectively. Upon scanning the same TSVs, the X-ray micrograph shows the seamline changes shape, voids are induced at the center of TSVs, and copper extrudes on top of the TSVs. This suggests the copper extrusion causes the etch stop layer to form a defect at the top of the TSVs. An X-ray microscope offers the potential to inspect voids in multiple vias at the same time without a physical cross section of the TSVs. This technique can be used to advance the study of different stress-induced voids used for 3D interconnects.