摘要
本文给出了一种数字控制的单相功率因数校正(PFC)方案。主电路采用并联交错拓扑,减小了系统输入电流纹波。控制系统采用数字算法构建PI调节器。为提高系统控制精度,考虑了数字延迟和采样保持等过程。用一款样机验证了设计结果,验证了设计的正确性。
This paper presents a digital controlled single-phase power factor correction(PFC) design. The interleaving topology is applied to the main circuit to reduce the input current ripple. A digital algorithm is introduced to construct a PI regulator for the control system. To determine the parameters of the PI controllers, In order to improve the control precision, both the digital delay and sample & hold process are take into consideration.To verify the correctness of the design, a prototype is given.
引文
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[3] Chen Fu-Zen,Dragan M.Digital control for efficiency improvements in interleaved boost PFC rectifiers[C]. Palm Springs:Applied power electronics conference and exposition,2010:21-25.