基于片上系统+FPGA的航管雷达终端综合记录系统设计
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摘要
针对航管雷达终端对显示画面、雷达视频、监控视频、台位语音、航迹数据、操控数据等信息的综合记录需求,对各类数据的特征和应用场景进行了研究,采用了以集成ARM A9处理器和视频编解码引擎的片上系统(System On Chip,SOC)为主,高性能FPGA为辅的综合记录系统架构,高速、高集成度电路设计方法和模块化、并行化的软件设计方法,高效、灵活的音视频压缩算法,实现了一种基于SOC+FPGA的航管雷达终端综合记录系统;解决了现有记录系统数据记录信息不完整、记录时长短、设备量大等问题;经实际产品测试,该综合记录系统满足了航管雷达终端记录的各项功能、性能指标,具备产品推广应用的条件。
Aimed at the integrated recording demands of air traffic control radar terminal such as display video,radar video,monitoring video,seat audio,track data and manipulating data,the features and application scenarios of these data were researched.An integrated recording architecture that SOC contained ARM A9 processor and video encoding/decoding engine was taken as dominant factor and high performance FPGA as supplementary factor was adopted.A design method based on high speed,high density circuits and modeling,parallelization software was introduced.An efficient audio and video compression algorithm was used.An integrated recording system for air traffic control radar terminal based on SOC and FPGA was implemented.Some problems of existing recording system were resolved,such as incomplete recording information,short recording time,large amount of equipment and etc.According to the result of product testing,the integrated recording system can fully meet the requirements of technical specifications and can be popularized in actual product.
Aimed at the integrated recording demands of air traffic control radar terminal such as display video,radar video,monitoring video,seat audio,track data and manipulating data,the features and application scenarios of these data were researched.An integrated recording architecture that SOC contained ARM A9 processor and video encoding/decoding engine was taken as dominant factor and high performance FPGA as supplementary factor was adopted.A design method based on high speed,high density circuits and modeling,parallelization software was introduced.An efficient audio and video compression algorithm was used.An integrated recording system for air traffic control radar terminal based on SOC and FPGA was implemented.Some problems of existing recording system were resolved,such as incomplete recording information,short recording time,large amount of equipment and etc.According to the result of product testing,the integrated recording system can fully meet the requirements of technical specifications and can be popularized in actual product.
引文
[1]张家勇,徐鹏,任翔.机动多功能航管雷达系统研究[J].现代电子技术,2014,37(9):4-7.
[2]李伟刚,杨小异.航管雷达和天气雷达综合显示系统的实现[J].中国科技投资,2012(24):85-86.
[3]高伟亮,李淑华,王守权,等.某型飞机数字视频记录系统设计[J].国外电子测量技术,2014,33(1):54-57,68.
[4]深圳市海思半导体有限公司.Hi3531A H.264编解码处理器用户指南[Z].
[5]ALTERA Corporation.Stratix IV Device Handbook[Z].
[6]田方.浅谈高清视频编码封装格式[J].大科技,2016(24):122-124.
[7]武丽芳,陈星,王福明.色度空间转换在视频采集系统中的应用[J].山西电子技术,2013(3):51-52,85.
[8]国际电信联盟.高清晰度电视演播室信号数字接口ITU-RBT.1120-8建议书[Z].
[9]Shan Yanhu,Ren Yongfeng,Zhen Guoyong,et al.An Enhanced Run-length Encoding Compression Method for Telemetry Data[J].Metrol.Meas.Syst,2017,24(3):551-562.
[10]杨东华.基于PCI-E Hard IP的雷达数据采集系统的设计与开发[J].现代雷达,2013:86-89.
[2]李伟刚,杨小异.航管雷达和天气雷达综合显示系统的实现[J].中国科技投资,2012(24):85-86.
[3]高伟亮,李淑华,王守权,等.某型飞机数字视频记录系统设计[J].国外电子测量技术,2014,33(1):54-57,68.
[4]深圳市海思半导体有限公司.Hi3531A H.264编解码处理器用户指南[Z].
[5]ALTERA Corporation.Stratix IV Device Handbook[Z].
[6]田方.浅谈高清视频编码封装格式[J].大科技,2016(24):122-124.
[7]武丽芳,陈星,王福明.色度空间转换在视频采集系统中的应用[J].山西电子技术,2013(3):51-52,85.
[8]国际电信联盟.高清晰度电视演播室信号数字接口ITU-RBT.1120-8建议书[Z].
[9]Shan Yanhu,Ren Yongfeng,Zhen Guoyong,et al.An Enhanced Run-length Encoding Compression Method for Telemetry Data[J].Metrol.Meas.Syst,2017,24(3):551-562.
[10]杨东华.基于PCI-E Hard IP的雷达数据采集系统的设计与开发[J].现代雷达,2013:86-89.