基于FPGA的动态部分重构系统实现
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摘要
上世纪60年代,美国加利福尼亚大学的Geraid Estrin提出了可重构计算的概念,并研制了原型系统,奠定了可重构计算系统的基础。70年代末,Suetlana P. Kartashev和Steven I. Kartashev博士提出了动态可重构系统的概念,对集成电路动态可重构系统进行了研究。进入90年代,可重构技术成为研究热点。基于此技术设计的可重构系统(Reconfigurable System)在多个领域广泛应用。近年来国外的航天机构如美国宇航局(NASA)和欧洲空间局(ESA)更是将可重构技术应用于航天领域。
数字电路设计中使用FPGA来完成系统的重构。基于FPGA动态可重构技术将设计从一个纯空间的数字逻辑系统化解为在时间、空间混合构建的数字逻辑系统。这种技术是数字系统设计方法、设计思想的变革,使FPGA资源利用率成倍提高,实现系统功能所用的硬件规模大大下降。
我国目前在FPGA可重构技术方面开展的研究很少。本论文旨在研究一种基于FPGA的可重构系统,采用CPLD辅助CPU控制FPGA动态部分重构的设计方案来实现,能够在系统运行时实现FPGA逻辑功能的动态部分重构。
本文以Xilinx公司Virtex系列器件为研究载体,针对基于SRAM工艺的FPGA的配置原理、配置结构和配置流程进行了研究。采用基于模块化设计方法实现FPGA动态部分重构,同时对基于差别的部分重构实现方法也作了研究。
本文中FPGA采用SelectMAP配置方式,实现配置逻辑的快速重构和动态部分重构,此外系统也能够实现FPGA在串行方式下的静态重构和在JTAG配置方式下动态重构。探讨了利用FPGA回读功能实现抗单粒子翻转的设计方法。采用VC设计可重构系统配置的控制软件,将此软件稍作修改,可以方便的将本系统移植到其他嵌入式系统中。
本课题的研究成果为我国未来将可重构技术应用于航天器电子系统设计打下良好的基础,具有较好的借鉴意义。
In 1960s, Geraid Estrin, the professor of University of California, put forward the concept of reconfigurable computing. He also brought a prototype system, by which the theory of reconfigurable computing is established. In late 1970s, DR. Suetlana P. Kartashev and Dr. Steven I. Kartashev mentioned the concept of dynamic reconfigurable system, and they further continued the research about how to form the dynamically reconfigurable system with IC.
The reconfigurable technology has been a hot topic of research since 1990s, and systems based on this technology have been applied in many areas.Recently, several institutes and space organization, such as NASA and ESA, have applied reconfigurable technology on space electronics design.
Reconfigurable systems of FPGA which this paper focuses on are mainly used in IC design.When using FPGA to establish reconfigurable systems, the system is transformed from a pure space digital logic design to a time-space mixture one.This new type system appears to implement the same function as observed in time scope, but the hardware resource is greatly reduced because of applying the reconfigurable technology. The reconfigurable technology based on FPGA is an innovation in IC design area.
Few researches about reconfigurable system are carried out in China.This paper is to introduce a reconfigurable system, in which the FPGA is dynamically and partially reconfigured while the system is running normally.
Because the FPGA used in the system is Virtex series which is produced by Xilinx incorporation, the structure, mechanism, and process of configuration based on Xilinx SRAM FPGA is analyzed. The paper also analyses the method of reconfiguration. The module-based design methodology is used to achieve FPGA dynamic partial reconfiguration, through which the FPGA function is divided into several modules, each module possessing separate physical area in FPGA. These modules can be reconfigured when other modules operate normally.The paper also analyses the difference-based reconfiguration method.
There is a CPU in the system that control the process of the reconfiguration.A CPLD which is also a Xilinx product is applied as an auxiliary device. FPGA is configured by SelectMAP mode, by which the FPGA can be configured and reconfigured rapidly.The system can also implement the static configuration of the FPGA by serial mode and the dynamic reconfiguration of the FPGA by JTAG mode. The paper also introduces the function of reading back configuration data from FPGA, this function can verify the Single Event Upset. Software which is developed in Visual C++ environment control the process of the reconfiguration, and user could make a little change to transplant this software to other embedded systems.
The fruit of this thesis establishes a firm foundation for the actual development of reconfiguration design of avionic device of our country. It affords a good reference to design a reconfigurable system with FPGA.
数字电路设计中使用FPGA来完成系统的重构。基于FPGA动态可重构技术将设计从一个纯空间的数字逻辑系统化解为在时间、空间混合构建的数字逻辑系统。这种技术是数字系统设计方法、设计思想的变革,使FPGA资源利用率成倍提高,实现系统功能所用的硬件规模大大下降。
我国目前在FPGA可重构技术方面开展的研究很少。本论文旨在研究一种基于FPGA的可重构系统,采用CPLD辅助CPU控制FPGA动态部分重构的设计方案来实现,能够在系统运行时实现FPGA逻辑功能的动态部分重构。
本文以Xilinx公司Virtex系列器件为研究载体,针对基于SRAM工艺的FPGA的配置原理、配置结构和配置流程进行了研究。采用基于模块化设计方法实现FPGA动态部分重构,同时对基于差别的部分重构实现方法也作了研究。
本文中FPGA采用SelectMAP配置方式,实现配置逻辑的快速重构和动态部分重构,此外系统也能够实现FPGA在串行方式下的静态重构和在JTAG配置方式下动态重构。探讨了利用FPGA回读功能实现抗单粒子翻转的设计方法。采用VC设计可重构系统配置的控制软件,将此软件稍作修改,可以方便的将本系统移植到其他嵌入式系统中。
本课题的研究成果为我国未来将可重构技术应用于航天器电子系统设计打下良好的基础,具有较好的借鉴意义。
In 1960s, Geraid Estrin, the professor of University of California, put forward the concept of reconfigurable computing. He also brought a prototype system, by which the theory of reconfigurable computing is established. In late 1970s, DR. Suetlana P. Kartashev and Dr. Steven I. Kartashev mentioned the concept of dynamic reconfigurable system, and they further continued the research about how to form the dynamically reconfigurable system with IC.
The reconfigurable technology has been a hot topic of research since 1990s, and systems based on this technology have been applied in many areas.Recently, several institutes and space organization, such as NASA and ESA, have applied reconfigurable technology on space electronics design.
Reconfigurable systems of FPGA which this paper focuses on are mainly used in IC design.When using FPGA to establish reconfigurable systems, the system is transformed from a pure space digital logic design to a time-space mixture one.This new type system appears to implement the same function as observed in time scope, but the hardware resource is greatly reduced because of applying the reconfigurable technology. The reconfigurable technology based on FPGA is an innovation in IC design area.
Few researches about reconfigurable system are carried out in China.This paper is to introduce a reconfigurable system, in which the FPGA is dynamically and partially reconfigured while the system is running normally.
Because the FPGA used in the system is Virtex series which is produced by Xilinx incorporation, the structure, mechanism, and process of configuration based on Xilinx SRAM FPGA is analyzed. The paper also analyses the method of reconfiguration. The module-based design methodology is used to achieve FPGA dynamic partial reconfiguration, through which the FPGA function is divided into several modules, each module possessing separate physical area in FPGA. These modules can be reconfigured when other modules operate normally.The paper also analyses the difference-based reconfiguration method.
There is a CPU in the system that control the process of the reconfiguration.A CPLD which is also a Xilinx product is applied as an auxiliary device. FPGA is configured by SelectMAP mode, by which the FPGA can be configured and reconfigured rapidly.The system can also implement the static configuration of the FPGA by serial mode and the dynamic reconfiguration of the FPGA by JTAG mode. The paper also introduces the function of reading back configuration data from FPGA, this function can verify the Single Event Upset. Software which is developed in Visual C++ environment control the process of the reconfiguration, and user could make a little change to transplant this software to other embedded systems.
The fruit of this thesis establishes a firm foundation for the actual development of reconfiguration design of avionic device of our country. It affords a good reference to design a reconfigurable system with FPGA.
引文
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