基于PWM的DC-DC转换器的带隙基准电压源设计
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摘要
如今便携式电子产品已经日益普及,作为保证电池续航能力重要模块的开关电源管理芯片,其性能也需要不断完善。开关电源模块体积在减小的同时,还要维持其带载能力的不变,随着开关电源的工作频率不断提高,对开关电源芯片中的重要模块带隙基准源设计也提出了更高的要求,如高电源抑制比、低温度系数等,并且由于单位面积晶体管数量的激增,功率型开关电源的热集聚问题凸显,过热保护已成为不容忽视的问题。
本文在分析了开关电源的带隙基准的应用需求,在此基础上提出了DC-DC开关电源带隙基准的设计指标,从器件选型和电路结构优化等方面考虑,设计出了一种围绕Brokaw带隙核且带过温保护的电压基准源。在对结构进行深入分析的基础上,引入了带零、极点补偿的反馈结构,优化了带隙基准的频率响应,提高了整体的电源抑制比(PSRR)'性能。采用新型的分段线性补偿方法,在高低温时能对基准输出电压的温度曲线进行直接调整,避免了传统分段补偿电路放大器的引用,有效提高了温度稳定性。过温保护功能模块在过热关断点和安全开启点处灵敏度高,输出控制信号建立迅速。仿真结果表明：带隙基准电压在-40℃-125℃的工作温度范围内温度系数达到3.74ppm/℃,电源电压2.5V-5.5V时基准输出电压为1.1943V. PSRR典型情况下约为80dB。内部集成带热滞回功能的过温保护电路,过温关断温度160℃,温度降低,安全开启阈值温度140℃,关断、开启迅速,设计的迟滞裕量符合系统要求,很好地防止了热振荡现象。
本文的电路在晶体管模型为UMC的0.6μm BCD工艺,采用仿真工具Hspice完成网表仿真验证,波形输出和计算,在仿真中考虑了工艺模型的影响,使仿真结果更加接近实际。仿真结构表明电路的各项性能指标和容差性能也十分好。
Portable electronic products have become increasingly popular. These products are high integration, small size characteristics. As the battery capacity assurance modules, switch-modle power supplies, their performances also need to constantly improve, mainly reflected in the reduced volume of module, while maintain its carrying capacity the same. The robustness of switch-modle power supplies directly affects the performances of electronical decices. With the switch operating frequency increasing, higher requirements are demanded on the internal integrated voltage reference's PSRR and low temperature coefficient. As a result of transistors surge in per unit areaover-temperature protection has become a problem that can not be ignored.
In this paper, we analyzed a variety of factors affecting the accuracy and temperature compensation strategies. From the device selection and structural optimization considerations, we proposed a high-performance voltage reference with OTP which is based on Brokaw bandgap core.On the basis of structure analysis, we optimized bandgap reference frequency response and improved the PSRR (power supply rejection ratio) performances. High-temperature curvature compensation circuit structure is simple and effective. Used piecewise linear compensation method at high temperature can give a direct adjustment to the temperature curve of output voltage, and effectively improve the temperature stability. Over-temperature protection function has simple structure and low power dissipation. It can be widely used for modularize in power management ICs.the added pre-turn-on design makes the overheating and security turn-on point with high sensitivity and output control signals to establish quickly. The simulation results for this circuit using Hspice show that the temperature coefficient is about 3.74ppm/℃and the output reference voltage is 1.1943V over the-40℃to 125℃temperature range 2.5V-5.5V supply voltage. The typical PSRR(Power Supply Rejection Rate) is 80.0dB. The threshold temperatures of the internal integrated thermal shutdown circuit with hysteresis are 160℃when OTP shutdown and 140℃when safely turn-on. Designed hysteresis margin can prevent thermal oscillation perfectly.
UMC 0.6μm BCD process is used to simulate the circuits. Simulation tool is HSPICE. Process modle infuences were consided in the simulation, making the simulation results much closer to reality.
本文在分析了开关电源的带隙基准的应用需求,在此基础上提出了DC-DC开关电源带隙基准的设计指标,从器件选型和电路结构优化等方面考虑,设计出了一种围绕Brokaw带隙核且带过温保护的电压基准源。在对结构进行深入分析的基础上,引入了带零、极点补偿的反馈结构,优化了带隙基准的频率响应,提高了整体的电源抑制比(PSRR)'性能。采用新型的分段线性补偿方法,在高低温时能对基准输出电压的温度曲线进行直接调整,避免了传统分段补偿电路放大器的引用,有效提高了温度稳定性。过温保护功能模块在过热关断点和安全开启点处灵敏度高,输出控制信号建立迅速。仿真结果表明：带隙基准电压在-40℃-125℃的工作温度范围内温度系数达到3.74ppm/℃,电源电压2.5V-5.5V时基准输出电压为1.1943V. PSRR典型情况下约为80dB。内部集成带热滞回功能的过温保护电路,过温关断温度160℃,温度降低,安全开启阈值温度140℃,关断、开启迅速,设计的迟滞裕量符合系统要求,很好地防止了热振荡现象。
本文的电路在晶体管模型为UMC的0.6μm BCD工艺,采用仿真工具Hspice完成网表仿真验证,波形输出和计算,在仿真中考虑了工艺模型的影响,使仿真结果更加接近实际。仿真结构表明电路的各项性能指标和容差性能也十分好。
Portable electronic products have become increasingly popular. These products are high integration, small size characteristics. As the battery capacity assurance modules, switch-modle power supplies, their performances also need to constantly improve, mainly reflected in the reduced volume of module, while maintain its carrying capacity the same. The robustness of switch-modle power supplies directly affects the performances of electronical decices. With the switch operating frequency increasing, higher requirements are demanded on the internal integrated voltage reference's PSRR and low temperature coefficient. As a result of transistors surge in per unit areaover-temperature protection has become a problem that can not be ignored.
In this paper, we analyzed a variety of factors affecting the accuracy and temperature compensation strategies. From the device selection and structural optimization considerations, we proposed a high-performance voltage reference with OTP which is based on Brokaw bandgap core.On the basis of structure analysis, we optimized bandgap reference frequency response and improved the PSRR (power supply rejection ratio) performances. High-temperature curvature compensation circuit structure is simple and effective. Used piecewise linear compensation method at high temperature can give a direct adjustment to the temperature curve of output voltage, and effectively improve the temperature stability. Over-temperature protection function has simple structure and low power dissipation. It can be widely used for modularize in power management ICs.the added pre-turn-on design makes the overheating and security turn-on point with high sensitivity and output control signals to establish quickly. The simulation results for this circuit using Hspice show that the temperature coefficient is about 3.74ppm/℃and the output reference voltage is 1.1943V over the-40℃to 125℃temperature range 2.5V-5.5V supply voltage. The typical PSRR(Power Supply Rejection Rate) is 80.0dB. The threshold temperatures of the internal integrated thermal shutdown circuit with hysteresis are 160℃when OTP shutdown and 140℃when safely turn-on. Designed hysteresis margin can prevent thermal oscillation perfectly.
UMC 0.6μm BCD process is used to simulate the circuits. Simulation tool is HSPICE. Process modle infuences were consided in the simulation, making the simulation results much closer to reality.
引文
[1]王阳元.21世纪硅微电子技术三个重要发展方向-缩小器件尺寸、系统集成芯片(SOC)、产业增长点.华东科技.2007,5(Z1)：7-12
[2]高工,许刚.精密基准电压源的设计思考与应用考虑(上)(下).模拟器件天地,1996：9-11.
[3]黄小军,黄济青.通信高频开关电源.北京机械工业出版社,2007：1-50
[4]何乐平,王忆.模拟集成电路设计与仿真.科学出版社,2008：196-262
[5]幸新鹏,李冬梅,王志华.CMOS带隙基准源研究现状.微电子学.2008,38(01)：57-63
[6]邹志革,邹雪城,黄峰.低压低功耗模拟集成电路设计技术及展望.微电子学.2006,36(1)：60-65
[7]朱贻玮.中国集成电路产业发展论述文集.北京新时代出版社,2006：24-42
[8]Aldokhaitla, Yamazakia and Ismailm.A sub-1-V CMOS bandgap voltage reference based on body-driven technique. IEEEISCAS, Vancou-ve, Canada,2004:215-219
[9]Zhai B, Hanson S and Blaauw D. Analysis and Mitigation of Variability in Subthreshold Design. ACM/IEEE International Symposium on Low Power Electronics and Design, 2005:20-25
[10]Lee I, Kim G and Kim W. Exponential Curvature-Compensated BiCMOS Bandgap References.IEEE Journal of Solid-state Circuits.1994,29(11):1396-1403
[11]Annema A J. Low-Power Bandgap References Featuring DTMOST's. IEEE Journal of Solid-state Circuits,1999:949-957
[12]吴金,刘桂芝,张麟.CMOS亚闽型带隙电压基准的分析与设计.固体电子学研究与进展.2005,25(3)：375-378
[13]SANsEN w M. Analog design essentials.The Netherlands Springer,2006:50-100
[14]KaNan Leung, PK T Mok, Chi Yat Leung. A 2-V 23-uA 5.3-ppm/℃curvature-compensated CMOS bandgap voltage reference. IEEE JSolid-State Circuits,2003,38(3):561-564
[15]J M Audy.3rd order curvature corrected bandgap cell. Proceedings of the 38th Midwest Symposiumon Circuits and Systems,1995,1(1):397-400
[16]G Meijer, P C Schmale and K V Zalinge.A new curvature-corrected bandgap reference.IEEE J Solid-State Circuits.1982,17:1139-1143
[17]Leung K N and Mok P K T.A-sub-1-V 15 ppm/℃ CMOS bandgap voltage reference without requiring low threshold voltage device.IEEE Journal of Solid-State Circuits.2002:526-530
[18]吴国平,黄年亚,刘桂芝.一种二阶曲率补偿带隙基准的研究.电子器件.200528(3)：696-701
[19]Yu Guo-yi and Zou Xue-cheng. A Novel Low-Voltage High Precision Current Reference Based on Subthreshold MOSFETs. Journal of Zhejiang University:Science,2006:100-115
[20]Giustolisi G, Palumbo G and Criscione M, "A low-voltage low-power voltage reference based on subthreshold MOSFET," IEEE Journal of Solid-State Circuits.2003,38:151-154
[21]Leung K N and Mok P K T. A CMOS voltage reference based on weighted △VGS for CMOS low-dropout linear regulator. IEEE Journal of Solid-State Circuits.2003,38(1): 146-140
[22]Filanovsky I M and Allam A.Mutual compensation of mobility and applications in CMOS circuits.IEEE Transactions on circuits and systems.2001,48:876-884
[23]Pillip E. Allen. CMOS模拟集成电路设计.电子工业出版社,2005：218-228
[24]Gabriel A and Ricon-More.Voltage References From Diodes to Precision High-Order Bandgap Circuits.NewYork, IEEE Press.2002:4-16,
[25]Sedra A S and Smith K C.Microelectronic Circuits. New York, Holt, Rinehart and Winston, 1987
[26]Perry Miller and Doug Moore.Precision voltage reference.Analog Applications Jonrnal Nov.1999
[27]Widlar R J.New Developments in IC Voltage Regulators," IEEE Journal of Solid-State Circuits.1971,6:2-7
[28]Kujik K E.A precision reference voltage source. IEEE J. Solid-state Circuits.1973,8: 222-226
[29]朱樟明,杨银堂,刘帘曦,朱磊.一种高性能CMOS带隙电压基准源设计.半导体学报.2004,25(25)：542-546
[30]Brokaw P A. A simple three-terminal IC bandgap reference.IEEE Journal of Solid-state Circuits.1974,9:388-393
[31]Buck, A. E, "A CMOS bandgap reference without resistors," IEEE Journal of Solid-state Circuits.2002,37(1):81-83
[32]Ro-MinWeng. A 1.8-V High-Precision Compensated CMOS Bandgap Reference.IEEE Journal of Solid-state Circuits.2005:271-273
[33]Song Ying. A precise compensated bandgap reference without resistors.Solid-State and Integrated Circuits Technology.2004,2:1583-1586
[34]Jianghua Chen, Xuewen Ni and Bangxian Mo.A High Precision Curvature Compensated Bandgap ference without Resistors.Solid-State and Integrate Circuits Technology.2006: 1748-1750
[35]Buddhika Abesingha, Gabriel A. Rincon-Mora, and David Briggs. Voltage Shift in Plastic-Packaged Bandgap References. Circuits and Systems Ⅱ:Analog and Digital Signal Processing,2002,49(10):681-685
[36]Giustolisi G, Palumbo G. Detailed frequency analysis of power supply rejection in brokaw bandgap.ISCAS (1) 2001:731-734
[37]Gianluca G and Gaetano P. A detailed analysis of power-supply noise attenuation in bandgapvoltage references.IEEE Trans. Circuits and Systems Ⅰ.2003,50(2):185-197
[38]张彬,冯全源.一种新型热关断电路设计.微电子学.2009,39(1)：42-44
[39]NAGEL M H, FONDERIE M J, MEIJER G G M, et al. Integrated Ⅳ thermal shutdown circuit. IEEE Electron Device Letters,1992,28(10):969-970
[40]刘振丰,冯全源.一种BiCMOS过热保护电路.微电子学.2005,35(6)：655-661
[41]LI Y-M, LAI X-Q, JIA X-Z. A Novel Temperature Stable CMOS Current Reference.8th International Conference on Solid-State and Integrated Circuit Technology, Shanghai.2006: 1772-1775
[42]Y Hu and M Sawan. A 900mV 25uw high PSRR CMOS Voltage Refrence Dedicated to Implantable Micro-Device. Proceedings of the 2003 International Symposium on Circuits and Systems.2003:373-376
[43]Mehrmanesh S, Vahidfa M B, Aslanzade H A, et al. A 1-Volt high PSRR CMOS bandgap voltage reference. IEEE International Symposium on Circuit and Systems.2003:381-384,
[44]Falconi, C and Giustolisi, GAnalysis of power supply gain of CMOS bandgap references. IEEE ISCAS, Island of Kos, Greece,2006:173-174
[45]文武,文治平,张永学.一种高精度自偏置共源共栅的CMOS带隙基准源.微电子学与计算机.2008,25(8)：216-220
[46]PhilipK.T.Mok and KaNang Leung.Design considerations of recent Advanced Low-voltage Low-temperature-coefficient CMOS Bandgap voltage Reference. Custom Integrated Circuits Conference,2004,25(8):635-642
[47]杨鹏,吴志明,吕坚,蒋亚东.一种二阶补偿的低压CMOS带隙基准电压源.微电子学,2007,37(06)：891-894
[48]Piero Malcovati, Franco Maloberti, Carlo Fiocchi.Curvature-Compensated BiCMOS
Bandgap with Ⅰ-Ⅴ Supply Voltage. Solid-State and Integrate Circuits Technology.2001,36(7): 1076-1081
[49]Kee-Chee Tiew, Jim Cusey, Randall Geiger.A Curvature Compensation Technique for Bandgap Voltage References Using Adaptive Reference Temperature. Analog Integrated Circuits and Signal Processing,2002:1230-1235
[50]吴志明,杨鹏,蒋亚东,吕坚,袁凯.一种分段线性补偿的CMOS带隙基准电压源.CN：200710049632,2007
[51]杨华中,姜韬.多点曲率补偿的带隙基准电压源.CN：200610114282,20070425
[52]徐伟.一种带曲率补偿的基准及过温保护电路.电子技术应用.2008,34(8)：69-74
[53]张林,徐世六等.一种带2阶补偿的高精度带隙基准源.微电子学.2009,39(1)：45-48
[54]刘兰澜.一种高性能带隙基准电压源的设计.吉林大学工学硕士.2007-12-5：42-46
[55]赵双龙.BCD工艺在电源管理IC设计中的应用.浙江大学工学硕士.2006-68-22
[56]Campbell S A.微电子制造科学原理与工程技术.曾莹,严利人等译,第二版.北京电子工业出版社.2003：518-522
[57]吴金,魏同立,郑艺,发展中的BiCMOS技术,微电子学.1995,25(2)：36-44
[58]李晓宁,刘文平.用模型参数优化法改进带隙基准的温度.微电子学与计算机.2008,(04)：205-208
[2]高工,许刚.精密基准电压源的设计思考与应用考虑(上)(下).模拟器件天地,1996：9-11.
[3]黄小军,黄济青.通信高频开关电源.北京机械工业出版社,2007：1-50
[4]何乐平,王忆.模拟集成电路设计与仿真.科学出版社,2008：196-262
[5]幸新鹏,李冬梅,王志华.CMOS带隙基准源研究现状.微电子学.2008,38(01)：57-63
[6]邹志革,邹雪城,黄峰.低压低功耗模拟集成电路设计技术及展望.微电子学.2006,36(1)：60-65
[7]朱贻玮.中国集成电路产业发展论述文集.北京新时代出版社,2006：24-42
[8]Aldokhaitla, Yamazakia and Ismailm.A sub-1-V CMOS bandgap voltage reference based on body-driven technique. IEEEISCAS, Vancou-ve, Canada,2004:215-219
[9]Zhai B, Hanson S and Blaauw D. Analysis and Mitigation of Variability in Subthreshold Design. ACM/IEEE International Symposium on Low Power Electronics and Design, 2005:20-25
[10]Lee I, Kim G and Kim W. Exponential Curvature-Compensated BiCMOS Bandgap References.IEEE Journal of Solid-state Circuits.1994,29(11):1396-1403
[11]Annema A J. Low-Power Bandgap References Featuring DTMOST's. IEEE Journal of Solid-state Circuits,1999:949-957
[12]吴金,刘桂芝,张麟.CMOS亚闽型带隙电压基准的分析与设计.固体电子学研究与进展.2005,25(3)：375-378
[13]SANsEN w M. Analog design essentials.The Netherlands Springer,2006:50-100
[14]KaNan Leung, PK T Mok, Chi Yat Leung. A 2-V 23-uA 5.3-ppm/℃curvature-compensated CMOS bandgap voltage reference. IEEE JSolid-State Circuits,2003,38(3):561-564
[15]J M Audy.3rd order curvature corrected bandgap cell. Proceedings of the 38th Midwest Symposiumon Circuits and Systems,1995,1(1):397-400
[16]G Meijer, P C Schmale and K V Zalinge.A new curvature-corrected bandgap reference.IEEE J Solid-State Circuits.1982,17:1139-1143
[17]Leung K N and Mok P K T.A-sub-1-V 15 ppm/℃ CMOS bandgap voltage reference without requiring low threshold voltage device.IEEE Journal of Solid-State Circuits.2002:526-530
[18]吴国平,黄年亚,刘桂芝.一种二阶曲率补偿带隙基准的研究.电子器件.200528(3)：696-701
[19]Yu Guo-yi and Zou Xue-cheng. A Novel Low-Voltage High Precision Current Reference Based on Subthreshold MOSFETs. Journal of Zhejiang University:Science,2006:100-115
[20]Giustolisi G, Palumbo G and Criscione M, "A low-voltage low-power voltage reference based on subthreshold MOSFET," IEEE Journal of Solid-State Circuits.2003,38:151-154
[21]Leung K N and Mok P K T. A CMOS voltage reference based on weighted △VGS for CMOS low-dropout linear regulator. IEEE Journal of Solid-State Circuits.2003,38(1): 146-140
[22]Filanovsky I M and Allam A.Mutual compensation of mobility and applications in CMOS circuits.IEEE Transactions on circuits and systems.2001,48:876-884
[23]Pillip E. Allen. CMOS模拟集成电路设计.电子工业出版社,2005：218-228
[24]Gabriel A and Ricon-More.Voltage References From Diodes to Precision High-Order Bandgap Circuits.NewYork, IEEE Press.2002:4-16,
[25]Sedra A S and Smith K C.Microelectronic Circuits. New York, Holt, Rinehart and Winston, 1987
[26]Perry Miller and Doug Moore.Precision voltage reference.Analog Applications Jonrnal Nov.1999
[27]Widlar R J.New Developments in IC Voltage Regulators," IEEE Journal of Solid-State Circuits.1971,6:2-7
[28]Kujik K E.A precision reference voltage source. IEEE J. Solid-state Circuits.1973,8: 222-226
[29]朱樟明,杨银堂,刘帘曦,朱磊.一种高性能CMOS带隙电压基准源设计.半导体学报.2004,25(25)：542-546
[30]Brokaw P A. A simple three-terminal IC bandgap reference.IEEE Journal of Solid-state Circuits.1974,9:388-393
[31]Buck, A. E, "A CMOS bandgap reference without resistors," IEEE Journal of Solid-state Circuits.2002,37(1):81-83
[32]Ro-MinWeng. A 1.8-V High-Precision Compensated CMOS Bandgap Reference.IEEE Journal of Solid-state Circuits.2005:271-273
[33]Song Ying. A precise compensated bandgap reference without resistors.Solid-State and Integrated Circuits Technology.2004,2:1583-1586
[34]Jianghua Chen, Xuewen Ni and Bangxian Mo.A High Precision Curvature Compensated Bandgap ference without Resistors.Solid-State and Integrate Circuits Technology.2006: 1748-1750
[35]Buddhika Abesingha, Gabriel A. Rincon-Mora, and David Briggs. Voltage Shift in Plastic-Packaged Bandgap References. Circuits and Systems Ⅱ:Analog and Digital Signal Processing,2002,49(10):681-685
[36]Giustolisi G, Palumbo G. Detailed frequency analysis of power supply rejection in brokaw bandgap.ISCAS (1) 2001:731-734
[37]Gianluca G and Gaetano P. A detailed analysis of power-supply noise attenuation in bandgapvoltage references.IEEE Trans. Circuits and Systems Ⅰ.2003,50(2):185-197
[38]张彬,冯全源.一种新型热关断电路设计.微电子学.2009,39(1)：42-44
[39]NAGEL M H, FONDERIE M J, MEIJER G G M, et al. Integrated Ⅳ thermal shutdown circuit. IEEE Electron Device Letters,1992,28(10):969-970
[40]刘振丰,冯全源.一种BiCMOS过热保护电路.微电子学.2005,35(6)：655-661
[41]LI Y-M, LAI X-Q, JIA X-Z. A Novel Temperature Stable CMOS Current Reference.8th International Conference on Solid-State and Integrated Circuit Technology, Shanghai.2006: 1772-1775
[42]Y Hu and M Sawan. A 900mV 25uw high PSRR CMOS Voltage Refrence Dedicated to Implantable Micro-Device. Proceedings of the 2003 International Symposium on Circuits and Systems.2003:373-376
[43]Mehrmanesh S, Vahidfa M B, Aslanzade H A, et al. A 1-Volt high PSRR CMOS bandgap voltage reference. IEEE International Symposium on Circuit and Systems.2003:381-384,
[44]Falconi, C and Giustolisi, GAnalysis of power supply gain of CMOS bandgap references. IEEE ISCAS, Island of Kos, Greece,2006:173-174
[45]文武,文治平,张永学.一种高精度自偏置共源共栅的CMOS带隙基准源.微电子学与计算机.2008,25(8)：216-220
[46]PhilipK.T.Mok and KaNang Leung.Design considerations of recent Advanced Low-voltage Low-temperature-coefficient CMOS Bandgap voltage Reference. Custom Integrated Circuits Conference,2004,25(8):635-642
[47]杨鹏,吴志明,吕坚,蒋亚东.一种二阶补偿的低压CMOS带隙基准电压源.微电子学,2007,37(06)：891-894
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Bandgap with Ⅰ-Ⅴ Supply Voltage. Solid-State and Integrate Circuits Technology.2001,36(7): 1076-1081
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