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有机铁电材料P(VDF-TrFE)纳米结构制备及性能研究
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摘要
有机铁电材料P(VDF-TrFE)以其独特的铁电、压电、热释电特性,在传感器、高密度数据存储、换能器、调制器等电子和机电器件中得到广泛应用,而这些器件的不断小型化和快速化对有机电子材料的微纳加工技术要求日益提高。至今一维和零维的纳米结构主要采用基于扫描探针(SPM)或电子束直写的方法,然而这些方法加工非常耗时,费用很高,不能用于大规模生产。喷墨打印法也已被尝试制备可与CMOS集成的FeRAM,具有低成本、低温的工艺优势,但打印法尚无法进行纳米尺度的加工。目前先进光刻技术可以进入亚100nm范围,但是加工小于40nm的纳米结构的加工还很艰难。另外,对于光刻和电子束刻蚀来说,电子束或紫外光以及刻蚀工艺均可能对聚合物材料性质有不可忽略的影响。为了减小工艺对P(VDF-TrFE)铁电性能的退化,同时简化工艺、降低成本,我们将采用新型的纳米压印技术实现P(VDF-TrFE)微纳米结构。
     本论文通过热纳米压印技术制备P(VDF-TrFE)(偏二氟乙烯-三氟乙烯共聚物)纳米线、纳米点阵以及电极结构,利用一系列物性和电性的检测手段表征和研究P(VDF-TrFE)薄膜在二维、一维、零维纳米尺度下的尺寸效应,深入研究了热纳米压印的关键工艺过程,包括压印深度、温度和压力之间的联系以及压印模板表面疏水处理。然后以热纳米压印技术制备的纳米结构有机铁电薄膜为研究对象,研究了纳米压印过程对有机铁电材料P(VDF-TrFE)性能的影响,探讨了利用纳米压印技术制备有机铁电薄膜多位存储器的可能性,为进一步研究P(VDF-TrFE)薄膜的铁电性质以及在微纳结构电子器件中的应用提供参考。
     本论文首先采用新型热纳米压印技术制备P(VDF-TrFE)微纳米线和纳米阵列。采用旋涂法在lcmxlcm的硅片衬底上制备高质量的P(VDF-TrFE)超薄薄膜(<200nm),以电子束直写刻蚀制备的硅模具作为模板,通过热纳米压印技术在P(VDF-TrFE)薄膜的玻璃化和熔化温度之间进行压印,系统研究了不同压力和温度对压印结构及其物性的影响,得出最优化的压印条件。通过组分、成膜方法、压印参数的调节实现微纳米结构形貌和尺寸的可控性以及良好的晶体结构和取向。
     然后对P(VDF-TrFE)薄膜纳米结构的物性和电性进行了系统研究。利用X光衍射、PFM及FTIR对不同工艺条件、不同结构的材料性质进行表征,着重研究各种工艺、结构对形貌和晶体性质的影响,利用PFM检测不同纳米结构的铁电和压电等特性。
     研究表明在P(VDF-TrFE)纳米压印制备工艺中,各项工艺、不同的结构都会影响最终材料的性能,因此要开展系统的材料表征及铁电性质研究。经研究得出,纳米压印条件影响P(VDF-TrFE)薄膜的结晶,控制纳米压印条件可以改善P(VDF-TrFE)薄膜的结晶度;结合高分辨率压电力显微镜(PFM)从微观角度对纳米结构有机铁电材料的性能进行了研究,初步实验结果表明经过热纳米压印,纳米结构的有机铁电薄膜依然保持良好的压电和铁电性能。这方面的研究对该材料功能薄膜的应用于超高密度数据存储器以及其它纳米铁电、压电器件提供了非常有用的参考。
Organic ferroelectric material, P (VDF-TrFE), finds a wide range of applications, including sensing and actuation, data storage, energy harvest and storage, based on its unique ferroelectric, piezoelectric and pyroelectric properties. With the ever-increasing demand for miniaturization of electronic and photonic devices, there have been tremendous efforts in developing nanostructured ferroelectric patterns with smaller feature size, higher density and improved sensitivity and functionality.
     The fabrication of one-dimensional 1D and OD nanostructures is based on direct writing using SPM or electron beam, which is very time-consuming, high-cost and thus not suitable for manufacturing. Ink jet printing is also applied to fabricate FeRAM integrated with CMOS under low temperature with low cost, but it is incapable of nanoscale process. To date although nanostructures with less than 100nm can be fabricated with sate-of-the-art optical lithography technique, it is still hard to get nanostructures with less than 40nm. Furthermore, for photo and e-beam lithography, photoresist, electron beam or ultraviolet beam, and etching processes all can easily cause damages in polymer materials and hence degradation of their electrical properties. In order to avoid unnecessary degradation of ferroelectricity of in P (VDF-TrFE) nanostructures, simplify the processing and lower the cost, we have applied Nanoimprint lithography (NIL) to fabricate nanostructures of P (VDF-TrFE) and systematically studied the properties of the nanoimprinted structures.
     In this paper, we fabricate nanowire, nanodot matrix and electrode structures of P (VDF-TrFE) with thermal NIL, and study the size-effect of P (VDF-TrFE) under OD, 1D and 2D through a series of physical and electrical characterizations. The key parameters of the thermal NIL process of P (VDF-TrFE) have been analyzed in detail, including the relationship among the depth of NIL, temperature and pressure, and hydrophobic treatment of the template. Then the influence of NIL process on the properties of P (VDF-TrFE) has been studied, and the possibility of using NIL technique to fabricate multi-bit memory with ferroelectric polymer has been discussed. This work paves the way for further research on the properties of nanoscale PVDF copolymer, developing new fabrication methods of micro/nano-structure and the downscaling of electrical device based on ferroelectronics.
     First we use nanoimprint lithography to fabricate high density nanostructures on the P (VDF-TrFE).Through adjusting technical parameters and the components in film control of their shape, size, and crystallographic orientation. High quality and ultrathin films of P (VDF-TrFE) (<200nm) has been prepared by spin-coating method on the lcm x lcm Si substrate. The NIL is applied under the temperature between glass transition and melting temperature of P (VDF-TrFE) on the template prepared with electron beam direct write lithography. The influences of pressure, temperature and conditions before and after baking on the nanoscale structures and their physical properties have been comprehensively studied, and the optimal conditions on different substrates have been found.
     Then the physical and electrical properties of nanostructures of P (VDF-TrFE) prepared by NIL technique have been systematically characterized using X-ray diffraction, PFM and FTIR. The emphasis is put on the effect of processing and structures on morphology, structure and crystallinity. The ferroelectric leakage, surface charge and other properties at nanostructures has been studied by using PFM.
     In NIL fabrication of P (VDF-TrFE), both the processing and the structure strongly influence the material and electrical properties, so and thus we investigated the correlation between process/structure and the material/ferroelectric properties. We have found that the morphology, orientation and crystallinity are influenced by NIL, and controlling the NIL condition can improve the crystallinity and change preferred orientation of P (VDF-TrFE). The ferroelectric properties have been studied by PMF, and the results show that the nanostructures ferroelectric polymer film maintains good piezoelectric and ferroelectric properties via thermal NIL. The results offer very useful reference for the application of the thin film in ultra-high density data storage and other ferroelectric and piezoelectric nanodevices.
引文
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