基于边界扫描测试技术的测试图形生成的研究
|
摘要
边界扫描测试技术在超大规模集成电路(VLSI)及由其构成系统的测试领域得到了日益广泛的应用。在国外，许多家测试厂商陆续开发了先进的边界扫描测试仪器和与之相配套的测试软件。目前国内在该领域的研究和应用与国外相比还有很大差距，还有很多工作要做。随着边界扫描测试技术应用的深入发展，可以做到不借助于专用的测试仪器，而只使用PC机和测试软件来对带有边界扫描结构的芯片和由它构成的系统进行测试。在开发测试软件的过程中，测试图形生成是测试软件要实现的首要工作，是测试控制、测试响应分析与故障诊断的前提，在整个测试过程中至关重要，这也是本文的主要研究内容。
作为测试图形生成的开发基础，本文论述了产生边界扫描测试技术的背景，边界扫描测试技术的应用和发展前景，深入研究了边界扫描测试技术—IEEE1149.1标准，对标准中所定义的测试存取端口和边界扫描测试结构进行了说明。本文针对板级互连测试进行了研究，介绍了有关互连测试的基本理论、互连故障模型，比较了各种测试生成算法，针对已有的被测PCB给出了进行完整性测试和互连测试的详细流程。从目前的研究现状出发，本文提出了由软硬件组成的，基于边界扫描测试技术的测试系统平台的设计思想，论述了测试平台的工作原理。在测试图形自动生成章节中，本文详细地剖析了测试图形生成中所必需的网络表文件和BSDL文件，采用符合国际工业标准的串行向量格式(SVF)描述测试图形，选择故障覆盖率高又易于编程实现的走“1”算法，结合所使用的被测电路板的边界扫描链信息，编程实现了互连测试图形自动生成。
最后，本文利用xilinx公司提供的源码包实现了PC机程序playSVF，该程序解释SVF测试图形文件，生成边界扫描测试协议的电平信号，通过PC机的并行口传送测试协议信号，对电路板进行了验证性测试。
Boundary scan test technology is being used widely in VLSI and correlative test area. Many overseas companies have designed advanced test apparatus and software for boundary scan. Up to now, internal research and application of boundary scan technology is still faintish corresponding to the one-up companies or countries, so there are many works to do in the future. With further application and development, boundary scan test can be carried out without professional apparatus, and be realized only in virtue of test software to test the chips or system with boundary scan units. In test software development, auto building of test patterns is a chief task, and also is the precondition for test control, test result analyse. Therefore it is critical work during the whole procedure, and it is studyed in details.
As the foundation of test patterns building, in the article, the reason and foreground of useing boundary scan is mentioned firstly. Then, IEEE1149.1 standard is expatiated, such as test access port and test structure. Basic concept and interconnection trouble models are described in details, existing building arithmetics for boundary scan test are analysed. On the PCB designed with independence, detailed procedure of integrity test and interconnection test is provided in the article. Further more, according to current research state, test system consist of software and hardware design is brought up, and the principle is expounded.
In section decribing auto building of test patterns, nettable and BSDL (Boundary Scan Decription Language) is describe in details. SVF (Serial Vector Format) which accords with international industry standard is used to describe test patterns. Walk " 1" arithmetic which has great trouble shooting ability is selected, at the same time, combining with boundary scan chain infomation of testing PCB, interconnectiong test patterns automatic generation is realized by program.
At the end, PC program playSVF is achieved using code packet that is provided by xilinx. The program executes SVF test patterns file analyzing, and products boundary scan test pulse .Transferring the pulse via parallel port of PC, validating test on PCB is realized.
作为测试图形生成的开发基础，本文论述了产生边界扫描测试技术的背景，边界扫描测试技术的应用和发展前景，深入研究了边界扫描测试技术—IEEE1149.1标准，对标准中所定义的测试存取端口和边界扫描测试结构进行了说明。本文针对板级互连测试进行了研究，介绍了有关互连测试的基本理论、互连故障模型，比较了各种测试生成算法，针对已有的被测PCB给出了进行完整性测试和互连测试的详细流程。从目前的研究现状出发，本文提出了由软硬件组成的，基于边界扫描测试技术的测试系统平台的设计思想，论述了测试平台的工作原理。在测试图形自动生成章节中，本文详细地剖析了测试图形生成中所必需的网络表文件和BSDL文件，采用符合国际工业标准的串行向量格式(SVF)描述测试图形，选择故障覆盖率高又易于编程实现的走“1”算法，结合所使用的被测电路板的边界扫描链信息，编程实现了互连测试图形自动生成。
最后，本文利用xilinx公司提供的源码包实现了PC机程序playSVF，该程序解释SVF测试图形文件，生成边界扫描测试协议的电平信号，通过PC机的并行口传送测试协议信号，对电路板进行了验证性测试。
Boundary scan test technology is being used widely in VLSI and correlative test area. Many overseas companies have designed advanced test apparatus and software for boundary scan. Up to now, internal research and application of boundary scan technology is still faintish corresponding to the one-up companies or countries, so there are many works to do in the future. With further application and development, boundary scan test can be carried out without professional apparatus, and be realized only in virtue of test software to test the chips or system with boundary scan units. In test software development, auto building of test patterns is a chief task, and also is the precondition for test control, test result analyse. Therefore it is critical work during the whole procedure, and it is studyed in details.
As the foundation of test patterns building, in the article, the reason and foreground of useing boundary scan is mentioned firstly. Then, IEEE1149.1 standard is expatiated, such as test access port and test structure. Basic concept and interconnection trouble models are described in details, existing building arithmetics for boundary scan test are analysed. On the PCB designed with independence, detailed procedure of integrity test and interconnection test is provided in the article. Further more, according to current research state, test system consist of software and hardware design is brought up, and the principle is expounded.
In section decribing auto building of test patterns, nettable and BSDL (Boundary Scan Decription Language) is describe in details. SVF (Serial Vector Format) which accords with international industry standard is used to describe test patterns. Walk " 1" arithmetic which has great trouble shooting ability is selected, at the same time, combining with boundary scan chain infomation of testing PCB, interconnectiong test patterns automatic generation is realized by program.
At the end, PC program playSVF is achieved using code packet that is provided by xilinx. The program executes SVF test patterns file analyzing, and products boundary scan test pulse .Transferring the pulse via parallel port of PC, validating test on PCB is realized.
引文
[1] 陈光禹，潘中良．可测性设计技术[M]，电子工业出版社，1997
[2] 骆丹．多芯片组件技术[J]．电子元件与材料，1994，13(1)
[3] 粱松海．VLSI可测性试设计研究[学位论文]．陕西微电子学研究所．1997年4月
[4] 宋慧滨，史又华．面向低功耗BIST的VLSI可测性设计技术[J]．电子器件，2002，25(1)
[5] Dellecker R. Boundary-scan bursts into the modem production facility. IEEE Aerospace and Electronics Systems Magazine, 2001, 16(6):21～24
[6] 宋克柱，杨小军，王砚方．边界扫描测试的原理及应用设计[J]．电子技术，2001，28(10)：29-32
[7] 郭学仁．边界扫描测试—复杂MCM的主流测试技术[J]．桂林电子工业学院学报，2000，20(4)
[8] Nelson R．PCB测试：用探针还是用测试接入口[EB／OL]Test&Measurement World, http://www.emchinamag.com.
[9] 温熙森，等．智能机内自检测试理论与应用[J]．北京：国防工业出版社，2002(1)：87~132
[10] John Koeter, Steve Sparks. Interconnect test using BIST embedded in IEEE 1149.1 designs. ASIC Conference and Exhibit, 1991. Proceedings, Fourth Annual IEEE International. 23-27 Sep1991
[11] 张弘．IEEE1149．1标准研究及测试系统实现[学位论文]．桂林电子工业学院．2000年3月
[12] IEEE1149．1测试的扩充http://www.jicheng.net.cn/auto_news/dianziceliang/1001553.html
[13] 温熙森，刘冠军等．基于边界扫描的板级BIT技术研究现状及发展趋势[J]．国外计测，1999，19(3)：38~41
[14] 谢正光．集成电路测试相关标准研究于探讨[J] 微电子学，2004，34(3)
[15] IEEE Std 1149.1-2001: IEEE Standard Test Access Port and Boundary -Scan Architecture. Published by the Institute of Electrical and Electronics Engineers, Inc., 345 East 47th Street, New York, NY 10017, USA.
[16] 刘明云 等．边界扫描板级链路测试性设计方法研究[J]．半导体技术29(11)：12-16
[17] 王隆刚 等．基于边界扫描测试技术的VLSI芯片互连电路测试研究[J]． 计算机测量与控制 2003．11(4)．
[18] 杨学贤 等．雷达系统级测试的边界扫描方法[J]．北京理工大学学报，2000，20(2)：232-235
[19] 徐钦桂 等．基于JTAG边界扫描的在线导通测试算法[J]．计算机工程与科学，1998，20(1)
[20] 胡政 温熙森．边界扫描测试的数学描述模型[J]．国防科技大学学报1999，21(5)
[21] 曾芷德．数字系统测试与可测性[M]．国防科学技术大学出版社．1992年
[22] 王隆刚 等 基于边界扫描的VLSI互连网络故障诊断研究[J]．空军雷达学院学报 2003年，17(1)
[23] 周战馨，缪栋．基于PCI总线的超大规模集成电路边界扫描测试系统[J]．计算机测量与控制，2002，10(2)：76-77
[24] 周清林 等．一种基于边界扫描的自适应测试生成算法[J]．电子测量与仪器学报 2002年增刊
[25] 胡政 钱彦岭 温熙森 边界扫描测试优化算法—极小权值-极大相异性算法[J]．测控技术 2000 19(9)
[26] Gene Wedge, Tom Conner. A Roadmap for Boundary-Scan Test Reuse International Test Conference October 1996
[27] DE JONG F, LIND VAN WlJINFAARDEN A J. Memory intercounection test at board level. Proc IEEE Int Test Conf [C]. Washington DC USA. 1992,328-337
[28] IEEE Std 1149.1-1990 (Includes IEEE Std 1149.1a-1993) Standard TestAccess Port and Boundary-Scan Architecture[S] [BSDL部分]
[29] xc95144 pq100.bsd[EB/OL].www.xilinx.com/support/sw_bsdl.htm.
[30] 罗秋明，颜学龙，郭学仁．可变长度边界扫描链的设计与仿真[J]．桂林电子工业学院学报，1998，18(4)：34~38
[31] Serial Vector Format Specification Revision E8 March 1999 Part Number: ASSET-SVF-DOC
[32] 卢镇波，李青，万晶编著，《Visual Basic．NET实用编程百例》，清华大学出版社，2005
[33] 张华，陈朝阳，沈绪榜．基于微机的边界扫描测试主控系统的设计[J]．华中科技大学学报，2002，30(5)：22~24
[34] J Drive: In-System Programming of IEEE Standard 1532 Devices www.xilinx.com
[2] 骆丹．多芯片组件技术[J]．电子元件与材料，1994，13(1)
[3] 粱松海．VLSI可测性试设计研究[学位论文]．陕西微电子学研究所．1997年4月
[4] 宋慧滨，史又华．面向低功耗BIST的VLSI可测性设计技术[J]．电子器件，2002，25(1)
[5] Dellecker R. Boundary-scan bursts into the modem production facility. IEEE Aerospace and Electronics Systems Magazine, 2001, 16(6):21～24
[6] 宋克柱，杨小军，王砚方．边界扫描测试的原理及应用设计[J]．电子技术，2001，28(10)：29-32
[7] 郭学仁．边界扫描测试—复杂MCM的主流测试技术[J]．桂林电子工业学院学报，2000，20(4)
[8] Nelson R．PCB测试：用探针还是用测试接入口[EB／OL]Test&Measurement World, http://www.emchinamag.com.
[9] 温熙森，等．智能机内自检测试理论与应用[J]．北京：国防工业出版社，2002(1)：87~132
[10] John Koeter, Steve Sparks. Interconnect test using BIST embedded in IEEE 1149.1 designs. ASIC Conference and Exhibit, 1991. Proceedings, Fourth Annual IEEE International. 23-27 Sep1991
[11] 张弘．IEEE1149．1标准研究及测试系统实现[学位论文]．桂林电子工业学院．2000年3月
[12] IEEE1149．1测试的扩充http://www.jicheng.net.cn/auto_news/dianziceliang/1001553.html
[13] 温熙森，刘冠军等．基于边界扫描的板级BIT技术研究现状及发展趋势[J]．国外计测，1999，19(3)：38~41
[14] 谢正光．集成电路测试相关标准研究于探讨[J] 微电子学，2004，34(3)
[15] IEEE Std 1149.1-2001: IEEE Standard Test Access Port and Boundary -Scan Architecture. Published by the Institute of Electrical and Electronics Engineers, Inc., 345 East 47th Street, New York, NY 10017, USA.
[16] 刘明云 等．边界扫描板级链路测试性设计方法研究[J]．半导体技术29(11)：12-16
[17] 王隆刚 等．基于边界扫描测试技术的VLSI芯片互连电路测试研究[J]． 计算机测量与控制 2003．11(4)．
[18] 杨学贤 等．雷达系统级测试的边界扫描方法[J]．北京理工大学学报，2000，20(2)：232-235
[19] 徐钦桂 等．基于JTAG边界扫描的在线导通测试算法[J]．计算机工程与科学，1998，20(1)
[20] 胡政 温熙森．边界扫描测试的数学描述模型[J]．国防科技大学学报1999，21(5)
[21] 曾芷德．数字系统测试与可测性[M]．国防科学技术大学出版社．1992年
[22] 王隆刚 等 基于边界扫描的VLSI互连网络故障诊断研究[J]．空军雷达学院学报 2003年，17(1)
[23] 周战馨，缪栋．基于PCI总线的超大规模集成电路边界扫描测试系统[J]．计算机测量与控制，2002，10(2)：76-77
[24] 周清林 等．一种基于边界扫描的自适应测试生成算法[J]．电子测量与仪器学报 2002年增刊
[25] 胡政 钱彦岭 温熙森 边界扫描测试优化算法—极小权值-极大相异性算法[J]．测控技术 2000 19(9)
[26] Gene Wedge, Tom Conner. A Roadmap for Boundary-Scan Test Reuse International Test Conference October 1996
[27] DE JONG F, LIND VAN WlJINFAARDEN A J. Memory intercounection test at board level. Proc IEEE Int Test Conf [C]. Washington DC USA. 1992,328-337
[28] IEEE Std 1149.1-1990 (Includes IEEE Std 1149.1a-1993) Standard TestAccess Port and Boundary-Scan Architecture[S] [BSDL部分]
[29] xc95144 pq100.bsd[EB/OL].www.xilinx.com/support/sw_bsdl.htm.
[30] 罗秋明，颜学龙，郭学仁．可变长度边界扫描链的设计与仿真[J]．桂林电子工业学院学报，1998，18(4)：34~38
[31] Serial Vector Format Specification Revision E8 March 1999 Part Number: ASSET-SVF-DOC
[32] 卢镇波，李青，万晶编著，《Visual Basic．NET实用编程百例》，清华大学出版社，2005
[33] 张华，陈朝阳，沈绪榜．基于微机的边界扫描测试主控系统的设计[J]．华中科技大学学报，2002，30(5)：22~24
[34] J Drive: In-System Programming of IEEE Standard 1532 Devices www.xilinx.com