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基于FPGA的空压机在线监测系统的前端设计
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摘要
状态监测是掌握设备运行状况,判断其运行趋势,降低故障率的重要手段之一。而获得反映设备运行的准确数据是状态监测的基础。本文适应旋转机械在线监测系统的发展,以实际工程项目为背景,对空压机在线监测系统的前端部分进行设计,有效地实现了信号调理、数据采集和数据存储等功能。
     本文先对空压机结构及其常发故障进行分析,提出了空压机监测测点布置方案,给出了在线监测系统总体结构图。之后结合数据采集系统要求,通过对比确定了数据采集系统的整体方案,即以现场可编程门阵列(FPGA)作为数据采集和存储的控制核心,实现多通道同步数据采集,并采用ARM处理器来实现数据的网络传输。
     在给出系统设计整体方案之后,本文着重于系统前端的硬件设计,并将其分为信号调理卡和数据采集卡两部分研究。信号调理卡包括I/V变换电路、程控增益放大电路、低通滤波电路;从传感器输出的模拟信号经过信号调理卡进行信号调理后,转换成数据采集卡可以接受的输入信号,以便数据采集卡进行后续处理。数据采集卡包括AD转换器接口电路、双口RAM接口电路和FPGA接口电路;FPGA作为系统的核心芯片,控制AD转换器对调理输出的信号进行转换,并将转换后的数据分时存入双口RAM之中。
     在完成了系统前端的硬件设计后,本文对FPGA的整体逻辑功能进行模块划分,并对其中的各个功能模块进行软件设计,同时,在ISE开发平台下,利用VHDL硬件描述语言来实现各模块的功能。
     最后本文阐明了数据采集系统的可靠性,提出了保证系统可靠性的基本措施,并强调数据采集系统的抗干扰设计是保证系统可靠性的主要措施。并且从隔离、退耦及接地三方面具体说明如何进行抗干扰设计。
The condition monitoring is one of the important measures for controlling the operating conditions of the monitored equipment, judging the equipment's developmental trend in the future and reducing its fault rate. Thus, acquiring the accurate data of the operating equipment is the foundation of the condition monitoring. This paper, adapting the development of on-line monitoring system of rotating machinery and taking actual engineering issue as the background, designs the front-end of on-line monitoring system for air compressor, which efficiently carries out signal conditioning, data acquisition and data storage.
    At first, this paper analyses the air compressor's structure as well as its faults, which always happen, and puts forward the project of measuring point's arrangement and framework plan of on-line monitoring system. Then, combining with the requirement of the data acquisition system, and by contrast, the paper confirms the whole project of the data acquisition system. That is to say, it makes FPGA as the controlling core in order to implement the multi-channel synchronal data acquisition and data storage and adopts ARM processor to carry out network transmission of the data.
    After designing the whole project, this paper puts emphasis on the hardware design of front-end, which is divided into two parts: the signal conditioning module and the data acquisition module. The signal conditioning module includes the I/V transform circuit, the programmable amplifier, and the low-pass filter. The analog signal, which is exported from the sensor, is processed by the signal conditioning module and used by the data acquisition module. The data acquisition module includes interface circuit of AD converter, dual-port RAM and FPGA. FPGA, as the core chip, controls AD converters which do AD converting for the processed signals and saves the data in dual-port RAM according to time.
    After completing the hardware design of front-end, the paper plots out the whole logic function of FPGA into modules and designs software for every module. Meanwhile, by making use of ISE development platform and combining VHDL, the certain functions of every module are carried out respectively.
    In the end, the paper clarifies the reliability of the data acquisition system, puts forward the essential measures of assuring the reliability of the data acquisition system, and emphasizes that the anti-jamming design is main measure. Besides, by the aid of isolating, decoupling and grounding, the paper points out how to implement the anti-jamming design.
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