考虑晶界离散分布的多晶硅薄膜晶体管模型研究
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摘要
多晶硅薄膜晶体管(Poly-Si TFTs)制造工艺简单、成本低廉,且具有较好的电学特性,在有源液晶显示器、三维立体集成电路、大容量存储器等方面得到广泛应用。然而,由于多晶硅材料中存在大量晶粒间界以及陷阱态,特别是沟道中晶界离散分布,导致poly-Si TFTs沟道多种物理效应相交叠,导电机制比较复杂,给poly-Si TFTs模型建模带来一定的困难。至今工业界尚未有国际上公认的标准模型。因此,以多晶硅薄膜导电机理为基础,建立既可以准确描述poly-Si TFTs电特性,又能适用于电路仿真的模型具有重要意义。
本文以多晶硅薄膜和poly-Si TFTs的导电机理和电特性为基础,开展并完成以下研究工作。
第一,根据多晶硅薄膜晶粒与晶界能带不连续的物理结构以及晶界势垒主导载流子物理行为的电学特性,引用扩散-漂移、热电子发射和隧穿等三种载流子输运机制,描述载流子在薄膜中的运动行为,建立多晶硅薄膜电导模型。该模型根据温度、杂质掺杂浓度、晶界陷阱浓度、载流子自由程以及附加势垒高度等因素自动调节各输运机制的作用,因此能表征宽掺杂浓度范围和温度变化范围的多晶硅薄膜电导特性。而且模型表达形式较简单,可用于poly-Si TFTs解析模型建模。
第二,以多晶硅薄膜电学特性以及上述电导模型为基础,结合晶界陷阱高斯分布以及晶界离散分布的特点,考虑表面散射、栅电压对晶界势垒调制效应、漏致晶界势垒降低效应以及漏致晶界势垒不均匀分布效应等影响载流子迁移率的主要因素,建立poly-Si TFTs有效迁移率模型。该模型较充分考虑poly-Si TFTs有效迁移率与栅电压和漏电压的关系,因此能较全面地描述了器件有效迁移率的特性。
第三,针对基于阈值电压的poly-Si TFTs模型需要引用无物理意义的光滑函数连接各工作区的电流方程,而基于表面势的poly-Si TFTs模型无法体现晶粒间界离散分布对器件电特性的影响等缺点,采用基于表面势模型的建模思路,将poly-Si TFTs沟道按晶粒的个数分成若干个小TFT,同时将影响沟道中晶粒内部表面势的晶界陷阱电荷单独考虑,解决晶界势垒不利于沟道表面势求解问题,结合各小TFT电流相等的原理,建立poly-Si TFTs的直流电流模型。本模型较充分考虑了晶界势垒对poly-Si TFTs伏安特性的影响,实现单一解析方程描述poly-Si TFTs的亚阈值区、线性区和饱和区电流的目标。
第四,根据对称双栅(Double Gate)MOSFETs建模思路,结合双栅DG poly-Si TFTs中沟道晶界离散分布以及沟道耦合电流效应等电学特性,考虑载流子在沟道中分布情况和输运特点,建立DG-poly-Si TFTs的漏电流模型。该模型能体现晶界离散分布特性,可以描述不同晶粒大小、晶界陷阱浓度和沟道电荷分布下的DG-poly-Si TFTs电特性。
综上所述,本文以多晶硅薄膜物理特性为基础,考虑沟道中晶界离散分布的特点,采用基于表面势的建模方法,提出多晶硅薄膜电导模型、poly-Si TFTs有效迁移率模型和漏电流模型以及双栅poly-Si TFTs电流模型。这些模型能较准确地反映器件的电学特性,并且具有解析形式,模型的有效性均得到实验数据的验证。
Due to the low production cost and favourable electrical property, the applications of polysilicon thin film transistors (poly-Si TFTs) have been increasing in the active matrix liquid crystal display (AMLCD), three-dimensional (3D) integration, high-capacity memories, and so on. However, resulting from the existing of discrete grain boundaries and trap states in the polysilicon film, several physical effects are coupled together in poly-Si TFTs and the conduction mechanisms become complicated. As a result,it is difficult to correctly model poly-Si TFTs, and so far there is no industrial standard model. Thus it is important to propose a physics-based model for poly-Si TFTs, which can not only describe the electrical characteristics, but also be suitable for circuit simulation.
According to the analysis of the conduction mechanisms of polysilicon and poly-Si TFTs, analytical and physics-based models for polysilicon and poly-Si TFTs have been developed in the present thesis,including the following issues:
Firstly, based on the discontinuous energy structure and the grain-boundary dominating behavior, a conduction model for polysilicon has been proposed. Three primary conduction mechanisms, such as diffusion-drift, thermionic-emission and tunneling, have been invoked to depict the carrier characteristics of polysilicon. The effects of three mechanisms can be adjusted according to the temperature, doping level, density of the trap states, density of free carriers and the addition potential barriers. Thus, the proposed model can be interpret the conduction characteristics of polysilicon thin films over a wide range of doping levels with temperature. The expression of the conduction model is simple enough to be introduced into the model of poly-Si TFTs.
Secondly, based on the proposed conduction model of polysilicon, Gaussian energy distribution model in the grain boundary and discrete grain boundaries in the channel, an effective mobility expression for poly-Si TFTs has been proposed by considering several important factors for mobility, such as the surface scattering effect, gate modulating effect, drain-induced-grain boundary barriers lowering effect and drain-caused grain-boundary-barrier asymmetrically distributing effect. Therefore, the present model can analytically and accurately describe the effective mobility of poly-Si TFTs. The calculated results are compared with the available experimental data and a good agreement is obtained.
Thirdly, the threshold-voltage-based model must use unphysical smooth function, while the surface-potential-based model is not capable to consider the particular effects of grain boundaries. To solve the limitations of the two models, a drain direct current model for poly-Si TFTs has been presented by using the surface-potential-based approach and dividing the channel into several small TFTs according to the number of the grain boundaries. In the developed model, the discrete distribution of grain boundaries has been taken into account, the drain currents of the subthreshold, linear and saturated regimes can be analytically explained by a single expression, and the validity is verified by the experimental data.
Fourthly, based on the model approach of double-gate (DG) MOSFET, a drain current model for DG poly-Si TFTs has been developed, which includes the discrete grain boundaries in the channel and the special conduction characteristics of DG-poly-Si TFTs. The drain current of DG poly-Si TFTs for different grain sizes, density of the trap states and carrier density can be described by the proposed model.
In conclusion, the models for polysilicon, single-gate and DG poly-Si TFTs are developed by basing on the physics property of polysilicon, considering the discrete distribution of grain boundaries, using the surface-potential approaches. Therefore, they can interpret the electrical characteristics of polysilicon and poly-Si TFTs, and be suitable for circuit simulators, which have been fully verified by the experimental data.
本文以多晶硅薄膜和poly-Si TFTs的导电机理和电特性为基础,开展并完成以下研究工作。
第一,根据多晶硅薄膜晶粒与晶界能带不连续的物理结构以及晶界势垒主导载流子物理行为的电学特性,引用扩散-漂移、热电子发射和隧穿等三种载流子输运机制,描述载流子在薄膜中的运动行为,建立多晶硅薄膜电导模型。该模型根据温度、杂质掺杂浓度、晶界陷阱浓度、载流子自由程以及附加势垒高度等因素自动调节各输运机制的作用,因此能表征宽掺杂浓度范围和温度变化范围的多晶硅薄膜电导特性。而且模型表达形式较简单,可用于poly-Si TFTs解析模型建模。
第二,以多晶硅薄膜电学特性以及上述电导模型为基础,结合晶界陷阱高斯分布以及晶界离散分布的特点,考虑表面散射、栅电压对晶界势垒调制效应、漏致晶界势垒降低效应以及漏致晶界势垒不均匀分布效应等影响载流子迁移率的主要因素,建立poly-Si TFTs有效迁移率模型。该模型较充分考虑poly-Si TFTs有效迁移率与栅电压和漏电压的关系,因此能较全面地描述了器件有效迁移率的特性。
第三,针对基于阈值电压的poly-Si TFTs模型需要引用无物理意义的光滑函数连接各工作区的电流方程,而基于表面势的poly-Si TFTs模型无法体现晶粒间界离散分布对器件电特性的影响等缺点,采用基于表面势模型的建模思路,将poly-Si TFTs沟道按晶粒的个数分成若干个小TFT,同时将影响沟道中晶粒内部表面势的晶界陷阱电荷单独考虑,解决晶界势垒不利于沟道表面势求解问题,结合各小TFT电流相等的原理,建立poly-Si TFTs的直流电流模型。本模型较充分考虑了晶界势垒对poly-Si TFTs伏安特性的影响,实现单一解析方程描述poly-Si TFTs的亚阈值区、线性区和饱和区电流的目标。
第四,根据对称双栅(Double Gate)MOSFETs建模思路,结合双栅DG poly-Si TFTs中沟道晶界离散分布以及沟道耦合电流效应等电学特性,考虑载流子在沟道中分布情况和输运特点,建立DG-poly-Si TFTs的漏电流模型。该模型能体现晶界离散分布特性,可以描述不同晶粒大小、晶界陷阱浓度和沟道电荷分布下的DG-poly-Si TFTs电特性。
综上所述,本文以多晶硅薄膜物理特性为基础,考虑沟道中晶界离散分布的特点,采用基于表面势的建模方法,提出多晶硅薄膜电导模型、poly-Si TFTs有效迁移率模型和漏电流模型以及双栅poly-Si TFTs电流模型。这些模型能较准确地反映器件的电学特性,并且具有解析形式,模型的有效性均得到实验数据的验证。
Due to the low production cost and favourable electrical property, the applications of polysilicon thin film transistors (poly-Si TFTs) have been increasing in the active matrix liquid crystal display (AMLCD), three-dimensional (3D) integration, high-capacity memories, and so on. However, resulting from the existing of discrete grain boundaries and trap states in the polysilicon film, several physical effects are coupled together in poly-Si TFTs and the conduction mechanisms become complicated. As a result,it is difficult to correctly model poly-Si TFTs, and so far there is no industrial standard model. Thus it is important to propose a physics-based model for poly-Si TFTs, which can not only describe the electrical characteristics, but also be suitable for circuit simulation.
According to the analysis of the conduction mechanisms of polysilicon and poly-Si TFTs, analytical and physics-based models for polysilicon and poly-Si TFTs have been developed in the present thesis,including the following issues:
Firstly, based on the discontinuous energy structure and the grain-boundary dominating behavior, a conduction model for polysilicon has been proposed. Three primary conduction mechanisms, such as diffusion-drift, thermionic-emission and tunneling, have been invoked to depict the carrier characteristics of polysilicon. The effects of three mechanisms can be adjusted according to the temperature, doping level, density of the trap states, density of free carriers and the addition potential barriers. Thus, the proposed model can be interpret the conduction characteristics of polysilicon thin films over a wide range of doping levels with temperature. The expression of the conduction model is simple enough to be introduced into the model of poly-Si TFTs.
Secondly, based on the proposed conduction model of polysilicon, Gaussian energy distribution model in the grain boundary and discrete grain boundaries in the channel, an effective mobility expression for poly-Si TFTs has been proposed by considering several important factors for mobility, such as the surface scattering effect, gate modulating effect, drain-induced-grain boundary barriers lowering effect and drain-caused grain-boundary-barrier asymmetrically distributing effect. Therefore, the present model can analytically and accurately describe the effective mobility of poly-Si TFTs. The calculated results are compared with the available experimental data and a good agreement is obtained.
Thirdly, the threshold-voltage-based model must use unphysical smooth function, while the surface-potential-based model is not capable to consider the particular effects of grain boundaries. To solve the limitations of the two models, a drain direct current model for poly-Si TFTs has been presented by using the surface-potential-based approach and dividing the channel into several small TFTs according to the number of the grain boundaries. In the developed model, the discrete distribution of grain boundaries has been taken into account, the drain currents of the subthreshold, linear and saturated regimes can be analytically explained by a single expression, and the validity is verified by the experimental data.
Fourthly, based on the model approach of double-gate (DG) MOSFET, a drain current model for DG poly-Si TFTs has been developed, which includes the discrete grain boundaries in the channel and the special conduction characteristics of DG-poly-Si TFTs. The drain current of DG poly-Si TFTs for different grain sizes, density of the trap states and carrier density can be described by the proposed model.
In conclusion, the models for polysilicon, single-gate and DG poly-Si TFTs are developed by basing on the physics property of polysilicon, considering the discrete distribution of grain boundaries, using the surface-potential approaches. Therefore, they can interpret the electrical characteristics of polysilicon and poly-Si TFTs, and be suitable for circuit simulators, which have been fully verified by the experimental data.
引文
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