基于标准总线的通用DSP并行处理系统设计
|
摘要
本论文主要讨论了通用DSP并行处理系统的设计问题，目的在于发展一种可重构的、可扩展的通用信号处理系统。一方面，可以通过灵活的软件编程来适应处理问题的变化和算法的发展；另一方面，可以通过简单的硬件扩展来适应处理规模的变化。文中首先介绍了DSP并行处理技术，接着提出了基于两种标准总线的接口电路实现方法：一种是基于PCI总线的结构，一种是基于VME总线的结构。这两种总线有着各自的特点，在系统设计中可以根据实际情况选用其中的一种作为DSP处理板的最终端接。文中提出了一种利用FIFO去耦合的设计思想，实现DSP与标准总线之间的异步通信，并详细给出了两种总线接口电路具体实现方法及部分功能模块的仿真结果。
This paper deals with techniques of designing all-purpose DSPs parallel processing systems, aims to develop signal processing systems which are more reconstructed and more scalable. On the one hand, we can meet the request of processing tasks changes and algorithm development through flexible software programming, on the other hand , we can meet the request of processing scale changes through simple hardware extention . First, Techniques of DSPs parallel processing are generally introduced. Then two structures of standard buses interfaces are presented. One is based on PCI bus, the other is based on VME bus. The two kind of buses have features of each own, either can be chosen as the final interface of DSPs board according to practical applications. The method of implementing asynchronous communication between DSPs and standard buses through FIFOs is discussed in detail and many simulation results of functional modules are also given.
This paper deals with techniques of designing all-purpose DSPs parallel processing systems, aims to develop signal processing systems which are more reconstructed and more scalable. On the one hand, we can meet the request of processing tasks changes and algorithm development through flexible software programming, on the other hand , we can meet the request of processing scale changes through simple hardware extention . First, Techniques of DSPs parallel processing are generally introduced. Then two structures of standard buses interfaces are presented. One is based on PCI bus, the other is based on VME bus. The two kind of buses have features of each own, either can be chosen as the final interface of DSPs board according to practical applications. The method of implementing asynchronous communication between DSPs and standard buses through FIFOs is discussed in detail and many simulation results of functional modules are also given.
引文
[1] Hurricane DSP Bridge ASIC Data Sheet Revision 1.01, Spectrum Signal Processing Inc. May 1999
[2] Universe Ⅱ User Manual, TUNDRA Semiconductor Corporation. Spring 1998
[3] Morocco 2 V8 Carrier Board Technical Reference Revision 2.03, Spectrum Signal Processing Inc. February 2001
[4] Processing SharcPAC Mezzanine Card User Guide Revision 2.10, Spectrum Signal Processing Inc. August 1999
[5] ADSP-2106x SHARC User's Manual, Analog Devices Inc. 1997
[6] 李贵山，戚得虎，PCI局部总线开发者指南，西安电子科技大学出版社，1997年1月
[7] 苏涛，吴顺君，廖晓群，高性能数字信号处理器宇高速实时信号处理，西安电子科技大学出版社，2000年6月
[8] IEEE Standard for a Versatile Backplane bus: VME bus, Sep 1987
[9] Bill Chiechi, MFLOPS Dictates Diligent Board Design, Electronic Design, September 3.1996, 147～149
[10] Rick Grehan. DSPs get parallel, Computer Design, September 1997. 83～98
[11] Grant Brydon, Decoupling Opens Bottlenecks In VME64-based DSP systems, Electronic Design, March 3,1997,147～149
[12] 陈光(礻禹)，VXI总线测试平台技术，电子科技大学出版社，成都，1996年10月
[13] S5933 PCI Controller Data Book .October 1997, Applied Micro Circuits Corporation
[14] S5933 PCI MatchMaker Developer's Kit Technical Reference Manual, Applied Circuits Corporation
[15] VMEbus Interface Handbook, Spring/Winter 2001, Cypress Semiconductor Data Book
[16] VIC068A-VMEbus Interface Controller, Spring/Winter 2001, Cypress Semiconductor Data Book
[17] PCI Master/Target MegaCore Function with DMA Data Sheet. Ver. 3.02, November 1999, Altera Digital Library
[18] 周庆瑞，牛超星，关华勇，CPLD技术在PCI总线开发中的应用，电子产品世界，2001年第6期A卷，24、25、38页
[19]马卫国，何佩琨，通用高速PCI总线目标模块的设计，电子技术应用，1999年第一期，11～14页
[20]汤晓安，赫晓峰，PCI系统配置机制的研究与实现，计算机自动测量与控制，2000年第8期第2卷，46、47、56页
[21]邹戗祁，杨玉森，PCI总线的实现方案及其实例，电子工程师，1999年第7期7～11
[22]J. Ludemann, D. Ressing, R. Wurth, A SHARC DSP Cluster aS HERA-B DAQ Building Block, IEEE TRANSACTION ON NUCLEAR SCIENCE, VOL 44, NO 3, JUNE 19977 403～406
[23]王宏伟，高梅国，韩月秋，基于VME总线SHARC并行处理系统的设计与实现，北京理工大学学报，2000年8月第20卷第4期，480～484
[24]项碧波，使用FPGA实现VME总线接口，声学与电子工程，2000年第3期，40～44
[25]王旭柱，王汝霖，陈锐，用FIFO实现DSP间的双向并行异步通讯，国外电子元器件，2001年第7期，44～46
[2] Universe Ⅱ User Manual, TUNDRA Semiconductor Corporation. Spring 1998
[3] Morocco 2 V8 Carrier Board Technical Reference Revision 2.03, Spectrum Signal Processing Inc. February 2001
[4] Processing SharcPAC Mezzanine Card User Guide Revision 2.10, Spectrum Signal Processing Inc. August 1999
[5] ADSP-2106x SHARC User's Manual, Analog Devices Inc. 1997
[6] 李贵山，戚得虎，PCI局部总线开发者指南，西安电子科技大学出版社，1997年1月
[7] 苏涛，吴顺君，廖晓群，高性能数字信号处理器宇高速实时信号处理，西安电子科技大学出版社，2000年6月
[8] IEEE Standard for a Versatile Backplane bus: VME bus, Sep 1987
[9] Bill Chiechi, MFLOPS Dictates Diligent Board Design, Electronic Design, September 3.1996, 147～149
[10] Rick Grehan. DSPs get parallel, Computer Design, September 1997. 83～98
[11] Grant Brydon, Decoupling Opens Bottlenecks In VME64-based DSP systems, Electronic Design, March 3,1997,147～149
[12] 陈光(礻禹)，VXI总线测试平台技术，电子科技大学出版社，成都，1996年10月
[13] S5933 PCI Controller Data Book .October 1997, Applied Micro Circuits Corporation
[14] S5933 PCI MatchMaker Developer's Kit Technical Reference Manual, Applied Circuits Corporation
[15] VMEbus Interface Handbook, Spring/Winter 2001, Cypress Semiconductor Data Book
[16] VIC068A-VMEbus Interface Controller, Spring/Winter 2001, Cypress Semiconductor Data Book
[17] PCI Master/Target MegaCore Function with DMA Data Sheet. Ver. 3.02, November 1999, Altera Digital Library
[18] 周庆瑞，牛超星，关华勇，CPLD技术在PCI总线开发中的应用，电子产品世界，2001年第6期A卷，24、25、38页
[19]马卫国，何佩琨，通用高速PCI总线目标模块的设计，电子技术应用，1999年第一期，11～14页
[20]汤晓安，赫晓峰，PCI系统配置机制的研究与实现，计算机自动测量与控制，2000年第8期第2卷，46、47、56页
[21]邹戗祁，杨玉森，PCI总线的实现方案及其实例，电子工程师，1999年第7期7～11
[22]J. Ludemann, D. Ressing, R. Wurth, A SHARC DSP Cluster aS HERA-B DAQ Building Block, IEEE TRANSACTION ON NUCLEAR SCIENCE, VOL 44, NO 3, JUNE 19977 403～406
[23]王宏伟，高梅国，韩月秋，基于VME总线SHARC并行处理系统的设计与实现，北京理工大学学报，2000年8月第20卷第4期，480～484
[24]项碧波，使用FPGA实现VME总线接口，声学与电子工程，2000年第3期，40～44
[25]王旭柱，王汝霖，陈锐，用FIFO实现DSP间的双向并行异步通讯，国外电子元器件，2001年第7期，44～46