用户名: 密码: 验证码:
MPSoCs for real-time neural signal decoding: A low-power ASIP-based implementation
详细信息    查看全文
文摘
In this paper we target the design of a dedicated low-power computing platform for neuroprosthetic applications. The system must be capable of decoding the information encoded in neural signals, to extract the patients’ motion intention. To this aim, a highly-portable and reliable integrated processing device is required. However, a commonly acknowledged design methodology, to be used in such kind of design cases, is still not available in literature. In this work, we propose and assess the adoption of the MPSoC paradigm as a prospective solution. We present a design-case of a custom MPSoC integrated solution, implementing an on-line neural signal decoding algorithm. The proposed system executes parallel software tasks onto customized ASIP processing cores. Experimental results, obtained by placement- and activity-aware power evaluations carried out using an industrial 40 nm technology node as a reference, assess that the performance and power-related features of the designed architecture are compliant with the implantability constraints and with the battery lifetime required for real-life use. Moreover, besides the effectiveness of the proposed solution, this paper demonstrates also that custom heterogeneous MPSoCs can successfully challenge ultra-low power bio-medical signal processing problem.

© 2004-2018 中国地质图书馆版权所有 京ICP备05064691号 京公网安备11010802017129号

地址:北京市海淀区学院路29号 邮编:100083

电话:办公室:(+86 10)66554848;文献借阅、咨询服务、科技查新:66554700