Symmetric and asymmetric multilevel inverter topologies with reduced switching devices
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文摘
Multilevel inverters have been developed to handle high power and high voltage in the flexible power systems. These inverters offer some inherent advantages over conventional 2-level inverters. High quality of the output voltage of the multilevel inverters is one of the most important advantages. In this paper, new symmetric and asymmetric multilevel inverter topologies are proposed. The proposed multilevel inverters use reduced number of switching devices for a specified number of output voltage levels in comparison with the conventional multilevel inverters and other non-conventional topologies. Hybrid topologies extracted from the proposed topologies are proposed for operating in higher voltage levels. In order to validate the proposed topologies, the simulation results with PSCAD/EMTDC software as well as the experimental results from a laboratory prototype are presented.

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