A review of the mechanical stressors efficiency applied to the ultra-thin body & buried oxide fully depleted silicon on insulator technology

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• 作者：Pierre Morin^a ; ^{pierre.morin@st.com" class="auth_mail" title="E-mail the corresponding author} ; Sylvain Maitrejean^b ; Frederic Allibert^d ; Emmanuel Augendre^b ; Qing Liu^a ; Nicolas Loubet^a ; Laurent Grenouillet^b ; Alexandre Pofelski^f ; Kangguo Chen^c ; Ali Khakifirooz^c ; Romain Wacquez^b ; Shay Reboh^e ; Aurore Bonnevialle^e ; ^f ; Cyrille le Royer^e ; Yves Morand^f ; Joel Kanyandekwe^a ; Daniel Chanemougamme^a ; Yann Mignot^a ; Yann Escarabajal^a ; Benoit Lherron^a ; Fadoua Chafik^a ; Sonia Pilorget^a ; Pierre Caubet^f ; Maud Vinet^e ; Laurent Clement^f ; Barbara Desalvo^b ; Bruce Doris^c ; Walter Kleemeier^a
• 刊名：Solid State Electronics
• 出版年：2016
• 出版时间：March 2016
• 年：2016
• 卷：117
• 期：Complete
• 页码：100-116
• 全文大小：2975 K

文摘

This paper reviews the different stressor techniques used in microelectronics, in the scope of the Ultra-Thin Body & Buried Oxide Fully-Depleted Silicon On Insulator technology (UTBB FD-SOI). We compare the mechanical efficiency of the various stressors and present the impact of device dimensions (active area, gate length and pitch) on their efficiency. Our study emphasizes the high efficiency, for the FD-SOI technology, of the intrinsically strained channels, compared to the traditional embedded raised source/drain and contact-etch stop liner. With these techniques FD-SOI technology has already demonstrated channel stress higher than 1.5 GPa for n type transistor and −2.3 GPa for the p type devices and we envision channel stress values up to ±3 GPa for n and p transistor channel, respectively. This performance is partly due to the mechanical configuration of intrinsically strained channels, in parallel mode rather than in serial mode as for the previous generation of stressors, which makes them less sensitive to the scaling of the contacted gate pitch. We also highlight another key element the high mechanical stability of the UTBB technology, related to the limited channel thickness (around 6 nm) which enables achieving highly stressed channel without substantial adaptation of the integration flows.