Development of arrays of Silicon Drift Detectors and readout ASIC for the SIDDHARTA experiment

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• 作者：R. Quaglia^a ; ^b ; ^{riccardo.quaglia@polimi.it" class="auth_mail" title="E-mail the corresponding author} ; F. Schembari^a ; ^b ; G. Bellotti^a ; ^b ; A.D. Butt^a ; ^b ; C. Fiorini^a ; ^b ; L. Bombelli^c ; G. Giacomini^d ; F. Ficorella^d ; C. Piemonte^d ; N. Zorzi^d
• 关键词：Silicon Drift Detectors ; CMOS preamplifier ; X-ray spectroscopy
• 刊名：Nuclear Instruments and Methods in Physics Research Section A: Accelerators, Spectrometers, Detectors and Associated Equipment
• 出版年：2016
• 出版时间：11 July 2016
• 年：2016
• 卷：824
• 期：Complete
• 页码：449-451
• 全文大小：656 K

文摘

This work deals with the development of new Silicon Drift Detectors (SDDs) and readout electronics for the upgrade of the SIDDHARTA experiment. The detector is based on a SDDs array organized in a 4×2 format with each SDD square shaped with 64 mm² (8×8) active area. The total active area of the array is therefore 32×16 mm² while the total area of the detector (including 1 mm border dead area) is i0005" class="mathmlsrc">title="View the MathML source" class="mathImg" data-mathURL="/science?_ob=MathURL&_method=retrieve&_eid=1-s2.0-S0168900215010773&_mathId=si0005.gif&_user=111111111&_pii=S0168900215010773&_rdoc=1&_issn=01689002&md5=c1cd6294267d716bb98e0b873242c9b2">class="imgLazyJSB inlineImage" height="12" width="81" alt="View the MathML source" style="margin-top: -5px; vertical-align: middle" title="View the MathML source" src="/sd/grey_pxl.gif" data-inlimgeid="1-s2.0-S0168900215010773-si0005.gif">class="mathContainer hidden">class="mathCode">. The SIDDHARTA apparatus requires 48 of these modules that are designed and manufactured by Fondazione Bruno Kessler (FBK). The readout electronics is composed by CMOS preamplifiers (CUBEs) and by the new SFERA (SDDs Front-End Readout ASIC) circuit. SFERA is a 16-channels readout ASIC designed in a i0006" class="mathmlsrc">title="View the MathML source" class="mathImg" data-mathURL="/science?_ob=MathURL&_method=retrieve&_eid=1-s2.0-S0168900215010773&_mathId=si0006.gif&_user=111111111&_pii=S0168900215010773&_rdoc=1&_issn=01689002&md5=c9920094602c6018e8789c755cd48590">class="imgLazyJSB inlineImage" height="14" width="52" alt="View the MathML source" style="margin-top: -5px; vertical-align: middle" title="View the MathML source" src="/sd/grey_pxl.gif" data-inlimgeid="1-s2.0-S0168900215010773-si0006.gif">class="mathContainer hidden">class="mathCode"> CMOS technology, which features in each single readout channel a high order shaping amplifier (9th order Semi-Gaussian complex-conjugate poles) and a high efficiency pile-up rejection logic. The outputs of the channels are connected to an analog multiplexer for the external analog to digital conversion. An on-chip 12-bit SAR ADC is also included. Preliminary measurements of the detectors in the single SDD format are reported. Also measurements of low X-ray energies are reported in order to prove the possible extension to the soft X-ray range.