A design methodology and various performance and fabrication metrics evaluation of 3D Network-on-Chip with multiplexed Through-Silicon Vias

详细信息    查看全文

• 作者：Mostafa Said ; ^a ; ^{mossaied2@gmail.com" class="auth_mail" title="E-mail the corresponding author} ; ^{mostafa.saied@ejust.edu.eg" class="auth_mail" title="E-mail the corresponding author}Author Vitae ; Ahmed Shalaby^b ; ^{ahmed.shalaby@ejust.edu.eg" class="auth_mail" title="E-mail the corresponding author}Author Vitae ; Farhad Mehdipour^c ; ^{farhad@ejust.kyushu-u.ac.jp" class="auth_mail" title="E-mail the corresponding author}Author Vitae ; Morteza Biglari-Abhari^d ; ^{m.abhari@auckland.ac.nz" class="auth_mail" title="E-mail the corresponding author}Author Vitae ; Mohamed El-Sayed^b ; ^{m.ragab@ejust.edu.eg" class="auth_mail" title="E-mail the corresponding author}Author Vitae
• 关键词：3D Network-on-Chip ; Traffic patterns ; Through-Silicon Vias (TSVs) ; Fabrication yield and cost
• 刊名：Microprocessors and Microsystems
• 出版年：2016
• 出版时间：June 2016
• 年：2016
• 卷：43
• 期：Complete
• 页码：26-46
• 全文大小：8187 K

文摘

The use of short Through-Silicon Vias (TSVs) in 3D integration Technology introduces a significant reduction in routing area, power consumption, and delay. Although, there are still several challenges in 3D integration technology; mainly low yield, which is a direct result of extra fabrication steps of TSVs. Therefore, reducing TSV count has a considerable effect on improving yield and hence reducing cost. A TSV multiplexing technique called TSVBOX was introduced in Said et al. (2013) to reduce the TSV count without affecting the direct benefits of TSVs. Although, the TSVBOX introduces some delay to the signals to be multiplexed, this delay effect of TSV multiplexing is not addressed yet. In this paper, we analyze the TSVBOX timing requirements and propose a design methodology for TSVBOX-based 3D Network-on-Chip (NoC). Then performance and power comparisons are conducted to investigate the direct effects of TSV multiplexing on these two metrics. After that the basic fabrication metrics are compared to investigate the effect of the proposed design methodology on yield and cost. We show that the TSVBOX extremely enhances the fabrication metrics at minimal degradation in performance and power consumption, especially for Hotspot-like traffic patterns.