RFID based access control protection scheme for SRAM FPGA IP cores

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• 作者：Laavanya Sridhar ; V. Lakshmi Prabha
• 关键词：SRAM ; Static random access memory ; FPGAs ; Field programmable gate arrays ; IPP ; Intellectual property protection ; Reconfiguration ; Access control ; Tag bypass feature ; Bitstream encryption ; Semi-passive radio frequency identification ; Decryption key transmi
• 刊名：Microprocessors and Microsystems
• 出版年：2013
• 出版时间：August-October, 2013
• 年：2013
• 卷：37
• 期：6-7
• 页码：629-640
• 全文大小：2121 K

文摘

Field-programmable gate-array (FPGA) based hardware IP cores have emerged as an integral part of modern SOC designs. IP trading plays central role in Electronic Design Automation (EDA) industry. While the potential of IP infringement is growing fast, the global awareness of IP protection remains low. In this work, we propose a Radio Frequency Identification (RFID) based protection scheme for Intellectual Property Protection (IPP) of Static Random Access Memory (SRAM) FPGA IP cores that overcome the limitations of existing IPP techniques. Here, three types of reconfigurable RFID tags is realised in order to support the incorporation of the proposed RFID based security scheme in all the reconfigurable FPGA devices of Xilinx family. Also a special tag bypass feature is employed to increase the suitability of proposed scheme as an IPP technique for reconfigurable IP cores. The proposed scheme supports safe exchange of reconfigurable FPGA IP cores between IP providers and system developers. The results derived from the testing of hardware prototype used for the evaluation of the proposed scheme are quite encouraging and shows that the proposed security feature can be incorporated into the reconfigurable IP cores of any functionality without significant performance degradation of the reconfigurable IP cores.