Reusability-aware cache memory sharing for chip multiprocessors with private L2 caches

详细信息    查看全文

• 作者：Hyunhee Kim ; Sungjun Youn ; Jihong Kim
• 关键词：CMPs ; Private L2 Cache ; Reusability ; Cache management
• 刊名：Journal of Systems Architecture
• 出版年：2009
• 出版时间：October-December 2009
• 年：2009
• 卷：55
• 期：10-12
• 页码：446-456
• 全文大小：890 K

文摘

In this paper, we propose a novel on-chip L2 cache organization for chip multiprocessors (CMPs) with private L2 caches. The proposed approach, called reusability-aware cache sharing (RACS), combines the advantages of both a private L2 cache and a shared L2 cache. Since a private L2 cache organization has a short access latency, the RACS scheme employs a private L2 cache organization. However, when a cache block in a private L2 cache is selected for eviction, RACS first evaluates its reusability. If the block is likely to be reused in the near future, it may be saved to a peer L2 cache which has space available. In this way, the RACS scheme effectively simulates the larger capacity of a shared L2 cache. Simulation results show that RACS reduced the number of off-chip memory accesses by 24 % compared to a pure private L2 cache organization on average for the SPLASH 2 multi-threaded benchmarks, and by 16 % for multi-programmed benchmarks.