Modeling and analysis of sub-surface leakage current in nano-MOSFET under cutoff regime

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• 作者：Yashu Swami ; ^{yashuswami@hotmail.com} ; Sanjeev Rai ^{srai@mnnit.ac.in}
• 关键词：Leakage current ; Sub-surface current ; Tunneling ; Nano-MOSFET ; Modeling ; Short channel effects ; Sub-threshold region
• 刊名：Superlattices and Microstructures
• 出版年：2017
• 出版时间：February 2017
• 年：2017
• 卷：102
• 期：Complete
• 页码：259-272
• 全文大小：1704 K
• 卷排序：102

文摘

The research work models and analyzes the sub-surface leakage current in cut-off regime for bulk driven nano-MOSFETs especially @ 10-nm technology node along with various sub 45-nm technology nodes for accurate results. Different types of leakage currents existing in nano-MOSFET are briefly discussed and successfully simulated on TCAD. Outcomes of the research work is briefly presented through the versatile simulations of the model devices to infer the most appropriate model at nanometer technology nodes. The enhanced model effectively considers the following parameter dependence in the account for better-quality value-added results like drain-to-source bias (VDS), gate-to-source bias (VGS), channel length (LG), source/drain junction depth (Xj), bulk doping concentration (NBULK), and operating temperature (Top).