Variability modeling in near-threshold CMOS digital circuits
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文摘

Variability is a strong limitation for sub and near-threshold digital CMOS.

Variability moves the minimum energy point towards the near-threshold region.

We propose a simple model for assessing the delay-energy trade-off with variability.

The model is validated in a 32 bit adder and a 8 bit multiplier test cases.

We derive an analytical solution of the VDD for minimum energy with variability.

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