A hardened network-on-chip design using runtime hardware Trojan mitigation methods

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• 作者：Jonathan Frey ^{jpg73@wildcats.unh.edu}Author Vitae ; Qiaoyan Yu ; ^{qiaoyan.yu@unh.edu}Author Vitae
• 关键词：Hardware Trojan ; Hardware security ; Network-on-chip (NoC) ; Bandwidth depletion ; Deadlock ; Livelock ; Denial-of-service attack ; Latency ; Throughput
• 刊名：Integration, the VLSI Journal
• 出版年：2017
• 出版时间：January 2017
• 年：2017
• 卷：56
• 期：Complete
• 页码：15-31
• 全文大小：2807 K
• 卷排序：56

文摘

We propose countermeasures to harden the NoC design, rather than fully relying on software or firmware solutions to detect a compromised NoC used in the MPSoC. Our router-level HT mitigation mechanism raises the bar for an adversary to simultaneously control multiple routing hops to create a malicious communication path between two IP cores in the NoC-based MPSoC. The proposed collaborative dynamic permutation and flit integrity check method is capable of examining the invariables of NoC to immediately terminate the detected HTs.