Dynamic many-process applications on many-tile embedded systems and HPC clusters: The EURETILE programming environment and execution platforms

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• 作者：Pier Stanislao Paolucci^aAuthor Vitae ; Andrea Biagioni^aAuthor Vitae ; Luis Gabriel Murillo^bAuthor Vitae ; Fré ; dé ; ric Rousseau^cAuthor Vitae ; Lars Schor^dAuthor Vitae ; Laura Tosoratto ; ^a ; ^{laura.tosoratto@roma1.infn.it" class="auth_mail" title="E-mail the corresponding author}Author Vitae ; Iuliana Bacivarov^dAuthor Vitae ; Robert L. Buecs^bAuthor Vitae ; Clé ; ment Deschamps^cAuthor Vitae ; Ashraf El-Antably^cAuthor Vitae ; Roberto Ammendola^eAuthor Vitae ; Nicolas Fournel^cAuthor Vitae ; Ottorino Frezza^aAuthor Vitae ; Rainer Leupers^bAuthor Vitae ; Francesca Lo Cicero^aAuthor Vitae ; Alessandro Lonardo^aAuthor Vitae ; Michele Martinelli^aAuthor Vitae ; Elena Pastorelli^aAuthor Vitae ; Devendra Rai^dAuthor Vitae ; Davide Rossetti^aAuthor Vitae ; Francesco Simula^aAuthor Vitae ; Lothar Thiele^dAuthor Vitae ; Piero Vicini^aAuthor Vitae ; Jan H. Weinstock^bAuthor Vitae
• 关键词：Many-tile hardware architectures ; Many-tile simulation ; Many-process applications ; Embedded systems ; High performance computing ; Dynamic multimedia application ; Spiking neural network ; Synaptic plasticity ; Fault tolerance ; Task migration ; Application mapping ; Hardware dependent Software ; Distributed network processor ; 3D toroidal interconnect
• 刊名：Journal of Systems Architecture
• 出版年：2016
• 出版时间：September 2016
• 年：2016
• 卷：69
• 期：Complete
• 页码：29-53
• 全文大小：6453 K

文摘

In the next decade, a growing number of scientific and industrial applications will require power-efficient systems providing unprecedented computation, memory, and communication resources. A promising paradigm foresees the use of heterogeneous many-tile architectures. The resulting computing systems are complex: they must be protected against several sources of faults and critical events, and application programmers must be provided with programming paradigms, software environments and debugging tools adequate to manage such complexity. The EURETILE (European Reference Tiled Architecture Experiment) consortium conceived, designed, and implemented: 1- an innovative many-tile, many-process dynamic fault-tolerant programming paradigm and software environment, grounded onto a lightweight operating system generated by an automated software synthesis mechanism that takes into account the architecture and application specificities; 2- a many-tile heterogeneous hardware system, equipped with a high-bandwidth, low-latency, point-to-point 3D-toroidal interconnect. The inter-tile interconnect processor is equipped with an experimental mechanism for systemic fault-awareness; 3- a full-system simulation environment, supported by innovative parallel technologies and equipped with debugging facilities. We also designed and coded a set of application benchmarks representative of requirements of future HPC and Embedded Systems, including: 4- a set of dynamic multimedia applications and 5- a large scale simulator of neural activity and synaptic plasticity. The application benchmarks, compiled through the EURETILE software tool-chain, have been efficiently executed on both the many-tile hardware platform and on the software simulator, up to a complexity of a few hundreds of software processes and hardware cores.