Effect of spacer dielectric engineering on Asymmetric Source Underlapped Double Gate MOSFET using Gate Stack

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• 作者：Ankush Chattopadhyay^b ; Arpan Dasgupta^b ; ^{arpan24470367@gmail.com} ; Rahul Das^b ; Atanu Kundu^a ; Chandan K. Sarkar^b
• 关键词：Source underlap ; Gate Stack ; Analog and RF analysis ; Non Quasi Static ; Single stage amplifier
• 刊名：Superlattices and Microstructures
• 出版年：2017
• 出版时间：January 2017
• 年：2017
• 卷：101
• 期：Complete
• 页码：87-95
• 全文大小：3245 K
• 卷排序：101

文摘

Impact of high-k spacer on asymmetric source underlap Gate Stack DG-MOSFET. Subthreshold analog/RF performance of asymmetric source underlap Gate Stack DG-MOSFET. Extraction of AC small signal parameters of asymmetric source underlap Gate Stack DG-MOSFET. RF parameters extraction using the Non Quasi Static (NQS) model of the A(S)-U-DG-GS MOSFET. Single stage amplifier analysis of A(S)-U-DG-GS MOSFET.