The Tag Filter Architecture: An energy-efficient cache and directory design

详细信息    查看全文

• 作者：Joan J. Valls^a ; ^{joavalmo@fiv.upv.es}Author Vitae ; Alberto Ros^b ; ^{aros@ditec.um.es}Author Vitae ; Marí ; a E. Gó ; mez^a ; ^{megomez@disca.upv.es}Author Vitae ; Julio Sahuquillo^a ; ^{jsahuqui@disca.upv.es}Author Vitae
• 关键词：Multicore processors ; Cache ; Directory ; Dynamic consumption
• 刊名：Journal of Parallel and Distributed Computing
• 出版年：2017
• 出版时间：February 2017
• 年：2017
• 卷：100
• 期：Complete
• 页码：193-202
• 全文大小：987 K
• 卷排序：100

文摘

Homogeneous distribution of the less significant bits of the tag across ways of cache sets. A single bit of the address is enough to guarantee a tag mismatch. We propose a mechanism to filter the ways accessed using the less significant bits of the address tag. Dynamic power consumption in the processor cache is reduced up to 85.9%. Dynamic power consumption in the directory cache is reduced up to 84.5%.