An induction machine and power electronic test system on a field-programmable gate array
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文摘

We present induction machine model for FPGA simulation, suitable for Hardware-In-the-Loop tests.

We present a novel variable parameter and variable topology FPGA circuit simulation solver.

We also present other available motor (PMSM and SRM) on FPGA.

All models and solvers are made in IEEE floating-point format and a unique FPGA bitstream is required.

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