Current-flow and current-density-aware multi-objective optimization of analog IC placement

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• 作者：Ricardo Martins ; ^{ricmartins@lx.it.pt" class="auth_mail" title="E-mail the corresponding author}Author Vitae ; Ricardo Pó ; voa ^{rpovoa@lx.it.pt" class="auth_mail" title="E-mail the corresponding author}Author Vitae ; Nuno Lourenç ; o ^{nlourenco@lx.it.pt" class="auth_mail" title="E-mail the corresponding author}Author Vitae ; Nuno Horta ^{nuno.horta@lx.it.pt" class="auth_mail" title="E-mail the corresponding author}Author Vitae
• 关键词：Absolute coordinates ; Analog Integrated circuit layout ; Current-density ; Current-flow constraints ; Electronic design automation ; Multi-objective optimization ; Pareto front ; Placement
• 刊名：Integration, the VLSI Journal
• 出版年：2016
• 出版时间：September 2016
• 年：2016
• 卷：55
• 期：Complete
• 页码：295-306
• 全文大小：2499 K

文摘

In this paper, the concept of hierarchical multi-objective optimization is applied to analog integrated circuit placement automation, where current-flow and current-density considerations are taken to improve the reliability and, reduce post-layout routing-induced parasitics of the circuit. The current-flow constraints are satisfied by forcing a monotonic routing directly in an absolute placement representation, while the impact of current-intensive interconnects is mitigated with the electromigration-aware optimization of the optimal wiring topology for all nets of the circuit. The problem׳s complexity is reduced using the hierarchy in the circuit׳s partitions, combining, bottom-up, Pareto fronts of placements that explore the tradeoffs between the design objectives. The approach is demonstrated in analog circuit structures for the United Microelectronics Corporation 130 nm design process. Post-layout simulations show the importance of considering both current-flow and current-density considerations for an effective fully-automatic placement.