Determination of safe reliability region over temperature and current density for through wafer vias

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• 作者：Charles S. Whitman ; ^{Charlie.Whitman@qorvo.com} ; Michael G. Meeder ; Peter J. Zampardi
• 关键词：Through-wafer via ; Backside via ; Black's equation ; Likelihood ratio ; FIT rate
• 刊名：Microelectronics Reliability
• 出版年：2017
• 出版时间：January 2017
• 年：2017
• 卷：68
• 期：Complete
• 页码：5-12
• 全文大小：1502 K
• 卷排序：68

文摘

Slot and circular GaAs vias were subjected to stress over temperature and current. Failure times were fitted to Black’s equation. The FIT rate of both vias were shown on contour maps of constant FIT rate revealing where the via can be operated reliably. Both circular and slot vias met the goal of 100 FITs in 10y at T=125C and J = 0.25 x106 A/cm2.