刊名:Nuclear Instruments and Methods in Physics Research Section A: Accelerators, Spectrometers, Detectors and Associated Equipment
出版年:2009
出版时间:1 June 2009
年:2009
卷:604
期:1-2
页码:390-392
全文大小:168 K
文摘
In this paper we present the characterization results relevant to a deep n-well (DNW) CMOS active pixel sensor chip designed for vertexing applications at the International Linear Collider. In this chip, named sparsified digital readout (SDR0), for the first time we implemented a sparsification logic at the pixel level. The DNW available in deep submicron CMOS processes is used to collect the charge released in the substrate, and signal processing is performed by a classical optimum amplifying stage for capacitive detectors. In this work, the experimental characterization of the SDR0 chip, including data from radioactive source (55Fe) tests, will be presented.