DC and RF characterization of InGaAs replacement metal gate (RMG) nFETs on SiGe-OI FinFETs fabricated by 3D monolithic integration

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• 作者：V. Deshpande^a ; ^{VEE@zurich.ibm.com} ; V. Djara^a ; E. O'Connor^a ; P. Hashemi^b ; K. Balakrishnan^b ; D. Caimi^a ; M. Sousa^a ; L. Czornomaz^a ; J. Fompeyrine^a
• 关键词：3D monolithic ; InGaAs ; RMG ; High-frequency ; FinFET
• 刊名：Solid-State Electronics
• 出版年：2017
• 出版时间：February 2017
• 年：2017
• 卷：128
• 期：Complete
• 页码：87-91
• 全文大小：1695 K
• 卷排序：128

文摘

We report the first RF characterization of short-channel replacement metal gate (RMG) InGaAs-OI nFETs built in a 3D monolithic (3DM) CMOS process. This process features RMG InGaAs-OI nFET top layer and SiGe-OI fin pFET bottom layer. We demonstrate state-of-the-art device integration on both levels. The bottom layer SiGe-OI pFETs are fabricated with a Gate-First (GF) process with fins and featuring epitaxial raised source drain (RSD) as well as silicide contact layer. The top layer InGaAs nFETs are fabricated with a RMG process featuring a self-aligned epitaxial raised source drain (RSD). We show that the 3D monolithic integration scheme does not degrade the performance of the bottom SiGe-OI pFETs owing to an optimized thermal budget for the top InGaAs nFETs. From the RF characterizations performed (post-3D monolithic process) on multifinger-gate InGaAs-OI nFETs, we extract a cut-off frequency (Ft) of 16.4 GHz at a gate-length (Lg)(Lg) of 120 nm. Measurements on various gate lengths shows increasing cut-off frequency with decreasing gate-length.