Design of a Nanoscale, CMOS-Integrable, Thermal-Guiding Structure for Boolean-Logic and Neuromorphic Computation

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• 作者：Desmond Loke ; Jonathan M. Skelton ; Tow-Chong Chong ; Stephen R. Elliott
• 刊名：ACS Applied Materials & Interfaces
• 出版年：2016
• 出版时间：December 21, 2016
• 年：2016
• 卷：8
• 期：50
• 页码：34530-34536
• 全文大小：513K
• ISSN：1944-8252

文摘

One of the requirements for achieving faster CMOS electronics is to mitigate the unacceptably large chip areas required to steer heat away from or, more recently, toward the critical nodes of state-of-the-art devices. Thermal-guiding (TG) structures can efficiently direct heat by “meta-materials” engineering; however, some key aspects of the behavior of these systems are not fully understood. Here, we demonstrate control of the thermal-diffusion properties of TG structures by using nanometer-scale, CMOS-integrable, graphene-on-silica stacked materials through finite-element-methods simulations. It has been shown that it is possible to implement novel, controllable, thermally based Boolean-logic and spike-timing-dependent plasticity operations for advanced (neuromorphic) computing applications using such thermal-guide architectures.