A wide-band high-accuracy incremental ADC

详细信息    查看全文

• 作者：Youngho Jung ; Gabor C. Temes
• 关键词：Incremental ΔΣ ADC ; Extended counting ; Gain scaling technique ; SAR ADC
• 刊名：Analog Integrated Circuits and Signal Processing
• 出版年：2017
• 出版时间：February 2017
• 年：2017
• 卷：90
• 期：2
• 页码：291-299
• 全文大小：
• 刊物类别：Engineering
• 刊物主题：Circuits and Systems; Electrical Engineering; Signal,Image and Speech Processing;
• 出版者：Springer US
• ISSN：1573-1979
• 卷排序：90

文摘

In this paper, a high resolution and wideband incremental ADC with extended counting is described and analyzed. The modulator introduced inter-stage gain to reduce the quantization noise without adding any hardware. Also, a gain scaling technique was used to decrease the power consumption by reducing the integrators’ output swing. First, the 2nd order incremental ΔΣ ADC and 11-bit SAR ADC were measured separately. Second, the incremental ΔΣ ADC with extended counting was tested. It achieved a 91.6 dB dynamic range and 77.8 dB SNDR in the 0–1.25 MHz signal band. The total power consumption is 53.5 mW with dual power supplies (analog 3.3 V, digital 1.8 V).