Advanced Cu chemical displacement technique for SiO2-based electrochemical metallization ReRAM application

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• 作者：Fun-Tat Chin (6)
  Yu-Hsien Lin (7)
  Hsin-Chiang You (8)
  Wen-Luh Yang (9)
  Li-Min Lin (6)
  Yu-Ping Hsiao (6)
  Chum-Min Ko (9)
  Tien-Sheng Chao (10)
  
  6. Ph.D. Program of Electrical and Communications Engineering ; Feng Chia University ; No. 100 Wenhwa Rd. ; Seatwen ; Taichung ; 40724 ; Taiwan
  7. Department of Electronic Engineering ; National United University ; 1 ; Lienda ; Miaoli ; 36003 ; Taiwan
  8. Department of Electronic Engineering ; National Chin Yi University of Technology ; No. 57 ; Sec. 2 ; Zhongshan Rd. ; Taiping Dist. ; Taichung ; 41170 ; Taiwan
  9. Department of Electronic Engineering ; Feng Chia University ; No. 100 Wenhwa Rd. ; Seatwen ; Taichung ; 40724 ; Taiwan
  10. Department of Electrophysics ; National Chiao Tung University ; 1001 University Road ; Hsinchu ; 30010 ; Taiwan
  
• 关键词：Cu CDT ; SiO2 ; ECM ; ReRAM
• 刊名：Nanoscale Research Letters
• 出版年：2014
• 出版时间：December 2014
• 年：2014
• 卷：9
• 期：1
• 全文大小：1,712 KB
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• 刊物主题：Nanotechnology; Nanotechnology and Microengineering; Nanoscale Science and Technology; Nanochemistry; Molecular Medicine;
• 出版者：Springer US
• ISSN：1556-276X

文摘

This study investigates an advanced copper (Cu) chemical displacement technique (CDT) with varying the chemical displacement time for fabricating Cu/SiO2-stacked resistive random-access memory (ReRAM). Compared with other Cu deposition methods, this CDT easily controls the interface of the Cu-insulator, the switching layer thickness, and the immunity of the Cu etching process, assisting the 1-transistor-1-ReRAM (1T-1R) structure and system-on-chip integration. The modulated shape of the Cu-SiO2 interface and the thickness of the SiO2 layer obtained by CDT-based Cu deposition on SiO2 were confirmed by scanning electron microscopy and atomic force microscopy. The CDT-fabricated Cu/SiO2-stacked ReRAM exhibited lower operation voltages and more stable data retention characteristics than the control Cu/SiO2-stacked sample. As the Cu CDT processing time increased, the forming and set voltages of the CDT-fabricated Cu/SiO2-stacked ReRAM decreased. Conversely, decreasing the processing time reduced the on-state current and reset voltage while increasing the endurance switching cycle time. Therefore, the switching characteristics were easily modulated by Cu CDT, yielding a high performance electrochemical metallization (ECM)-type ReRAM.