Analysis and modeling of response of external noise in oscillators

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• 作者：Tsutomu Yoshimura ; Takao Kihara
• 关键词：Interference ; Voltage ; controlled oscillator ; Phase ; locked loop ; Behavioral model
• 刊名：Analog Integrated Circuits and Signal Processing
• 出版年：2016
• 出版时间：May 2016
• 年：2016
• 卷：87
• 期：2
• 页码：313-325
• 全文大小：2,987 KB
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• 作者单位：Tsutomu Yoshimura (1)
  Takao Kihara (1)
  
  1. Graduate School of Engineering, Osaka Institute of Technology, Osaka, Japan
  
• 刊物类别：Engineering
• 刊物主题：Circuits and Systems
  Electronic and Computer Engineering
  Signal,Image and Speech Processing
  
• 出版者：Springer Netherlands
• ISSN：1573-1979

文摘

In this study, the influence of external-voltage noise on voltage-controlled oscillators (VCOs) is investigated. The phase error is derived using the extended phase domain response of the oscillators based on the impulse sensitivity function. We found that the frequency properties of the noise sensitivity strongly depend on the circuit configuration of the VCO. We applied these results to the linear model of a phase-locked loop (PLL) and conducted a numerical simulation. The simulation result showed that the generation of the phase error depends on the timing of impulse noise and the bandwidth of the PLL. The test chip for verification is designed and fabricated with a standard CMOS process.