A Novel Low Voltage Low Power High Linearity Self-biasing Current-reuse Up-conversion Mixer
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- 作者：Lv Zhao ; Chunhua Wang
- 关键词：CMOS ; Radio frequency ; Mixer ; Self ; biasing ; Current ; reuse ; Low voltage ; Low power
- 刊名：Wireless Personal Communications
- 出版年：2015
- 出版时间：January 2015
- 年：2015
- 卷：80
- 期：1
- 页码：277-287
- 全文大小：2,716 KB
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文摘
In this paper, a new complementary metal oxide semiconductor (CMOS) low-voltage low-power current-reuse up-conversion mixer using Chartered \(0.18\,\upmu \hbox {m}\) CMOS process for radio frequency transmitter applications is presented. A novel self-biasing current-reuse (SBCR) technique is adopted to achieve more ideal conversion gain (CG) and third-order intermodulation intercept point \((\hbox {IIP}_{3})\) in the transconductance stage with minimal additional power consumption, which perfects the mixer than conventional Gilbert mixer. As the new SBCR technique employed in the mixer, the post-layout simulation results demonstrate that the SBCR-mixer features about 13?dB CG with 0?dBm local oscillator (LO) power and port-to-port isolation better than 84?dB, while noise figure is 15.66?dB. The \(\hbox {IIP}_{3}\) and 1?dB compression point of the mixer are 7.78?dBm and \(-\) 3.76?dBm at 1.41?mW power consumption from a 1?V supply voltage. The chip area is only \(0.70 \times \,0.72\,\hbox {mm}^{2}\) even including test pads.