Body-driven log/antilog PVT compensated analog computational block

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• 作者：Karama M. AL-Tamimi ; Kamal EL-Sanakary
• 关键词：Log/antilog ; PVT ; Multiplier ; Body ; driven ; Current ; mode
• 刊名：Analog Integrated Circuits and Signal Processing
• 出版年：2017
• 出版时间：March 2017
• 年：2017
• 卷：90
• 期：3
• 页码：693-700
• 全文大小：
• 刊物类别：Engineering
• 刊物主题：Circuits and Systems; Electrical Engineering; Signal,Image and Speech Processing;
• 出版者：Springer US
• ISSN：1573-1979
• 卷排序：90

文摘

A four quadrant analog multiplier is proposed in this paper. It is using body-driven MOSFETs operating in subthreshold region. In essence, the subthreshold approach is too susceptible to PVT variations. However, these effects have been intrinsically mitigated by the log/antilog characteristics and enable the realization of current-mode multiplication function in simple and power efficient way at the same time. The multiplier is designed in CMOS 0.18 µm 1P6 M process technology. It occupies an active area of 250 µm2 and consumes 0.698 µW from ± 0.3 V voltage supply. The results are in agreement with the theory under different conditions.