Simulation and validation of diagram ladder—petri nets

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• 作者：J. C. Quezada ; J. Medina ; E. Flores&#8230
• 关键词：Control algorithms ; Discrete event systems ; Ladder diagram ; Petri nets ; Programmable logic controller ; Simulation ; Validation
• 刊名：The International Journal of Advanced Manufacturing Technology
• 出版年：2017
• 出版时间：February 2017
• 年：2017
• 卷：88
• 期：5-8
• 页码：1393-1405
• 全文大小：
• 刊物类别：Engineering
• 刊物主题：Industrial and Production Engineering; Media Management; Mechanical Engineering; Computer-Aided Engineering (CAD, CAE) and Design;
• 出版者：Springer London
• ISSN：1433-3015
• 卷排序：88

文摘

Automated systems based on programmable logic controllers (PLC) are still applied in discrete event systems (DES) for controlling and monitoring of industrial processes signals. PLC-based control systems are characterized for having physical input and output signals coming from and going to sensors and actuators, respectively, which they are in direct contact with the production or manufacturing process. The input subsystem to PLC consists of sensor-wiring-physical inputs module, and it can present two kinds of faults: short circuit or open circuit, in one or more signals of the process physical inputs, which it causes faults in the control and/or in the control algorithms behavior. Ladder diagram (LD) is one of the five programming languages supported by the International Electrotechnical Commission (IEC) through the IEC-61131-3 standard, and it remains being used at industry for control algorithm design of PLC-based systems. This paper proposes the simulation and validation of control algorithms developed in LD by using Petri Nets (PN) in order to deal with the possible fault options (short circuit and/or open circuit) in the physical inputs subsystem of a PLC-based control system. One control algorithms in LD have been analyzed in order to show the advantages of the proposed approach.